Quick Start Guide
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11. The results from the captured data of Channel 1 should look like
Figure 5
and the performance should
be similar to
Table 1
. If this result is not achieved, then see the
Quick Start Troubleshooting
section of
this document.
Mixing with Fs/4 inverts the spectrum causing the 170MHz input tone location to be located at -Fin + Fs/4 = -170 MHz
+ [491.52/4] = -47.12 MHz
Figure 5. Channel 1 Data Capture Results from Quick Start Procedure
Table 1. Quick Start Performance Measurements
Result
Measured Value
Units
SNR
69.73
dBFS
SFDR
95.6
dBFS
2.3.3
ADS54J66 GUI Configuration, Bypass Mode (For the ADS54J66EVM only)
In the ADS54Jxx GUI, click on the
Low Level View
tab then click the
Load Config
button. Navigate to
“C:\Program Files(86)\Texas Instruments\ADS54Jxx GUI\Configuration Files”, select the file called
“LMK_Config_LMF_4841_491p52_MSPS.cfg”, then click “OK”. This will program the LMK04828 to provide
a 491.52-MHz clock to the ADC. Verify that the LMK04828 PLL is locked by checking that the “PLL2
LOCKED” LED (D3) is lit. Once the LMK04828 PLL is locked, press SW1 (
ADC RESET
) to provide a
hardware reset to the ADC.
In the
Low Level View
tab, click
Load Config
. Select the file called “ADS54J66_bypass_4421.cfg” and click
"OK". The ADS54J66EVM is now configured for bypass mode using 4 JESD204B lanes.
8
ADS5XJ6X Evaluation Module
SLAU641D – June 2015 – Revised January 2016
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