Terasic VEEK-MT2, User Manual

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VEEK-MT2 User Manual
2
www.terasic.com
July 4, 2016
The key features of the board are listed below:

DE2-115 Development Board

Cyclone IV EP4CE115 FPGA
o
114,480 LEs
o
432 M9K memory blocks
o
3,888 Kb embedded memory
o
4 PLLs

Configuration
o
On-board USB-Blaster circuitry
o
JTAG and AS mode configuration supported
o
EPCS64 serial configuration device

Memory Devices
o
128MB SDRAM
o
2MB SRAM
o
8MB Flash with 8-bit mode
o
32Kb EEPROM

Switches and Indicators
o
18 switches and 4 push-buttons
o
18 red and 9 green LEDs
o
Eight 7-segment displays

Audio
o
24-bit encoder/decoder (CODEC)
o
3.5mm line-in, line-out, and microphone-in jacks

Character Display
o
16x2 LCD module

On-board Clocking Circuitry
o
Three 50MHz oscillator clock inputs
o
SMA connectors (external clock input/output)

SD Card Socket
o
Provides SPI and 4-bit SD mode for SD Card access

Two Gigabit Ethernet Ports
o
Integrated 10/100/1000 Ethernet

High Speed Mezzanine Card (HSMC)
o
Configurable I/O standards (voltage levels: 3.3/2.5/1.8/1.5V)

USB Type A and B
o
Provides host and device controller compliant with USB 2.0
o
Supports data transfer at full-speed and low-speed
o
PC driver available