Terasic DE1-SoC-MTL2, User Manual

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DE1-SoC-MTL
2
User Manual
5
www.terasic.com
December 18, 2014

Display
o
24-bit VGA DAC

Audio
o
24-bit CODEC, line-in, line-out, and microphone-in jacks

Video Input
o
TV decoder (NTSC/PAL/SECAM) and Video-in connector

ADC
o
Fast throughput rate: 1 MSPS
o
Channel number: 8
o
Resolution: 12-bit
o
Analog input range : 0 ~ 2.5 V or 0 ~ 5V by selecting the RANGE bit in the control register

Switches, Buttons and LEDs
o
5 user keys (4 for the FPGA and 1 for the HPS)
o
10 user switches for the FPGA
o
11 user LEDs (10 for the FPGA and 1 for the HPS)
o
2 HPS reset buttons (HPS_RESET_n and HPS_WARM_RST_n)
o
Six 7-segment displays

Sensor
o
G-sensor for the HPS

Power
o
12V DC input

Capacitive LCD Touch Screen
o
Equipped with an 7-inch Amorphous-TFT-LCD (Thin Film Transistor Liquid
Crystal Display) module
o
800x600x3(RGB) Resolution