DE1-SoC-MTL
2
User Manual
4
www.terasic.com
December 18, 2014
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The key features of this kit are listed below:
Cyclone V SE SoC—5CSEMA5F31C6N
o
Dual-core ARM Cortex-A9 (HPS)
o
85K programmable logic elements
o
4,450 Kbits embedded memory
o
6 fractional PLLs
o
2 hard memory controllers
Configuration Sources
o
Quad serial configuration device – EPCS128 for the FPGA
o
On-board USB Blaster II (normal type B USB connector)
Memory Devices
o
64MB (32Mx16) SDRAM for the FPGA
o
1GB (2x256MBx16) DDR3 SDRAM for the HPS
o
microSD card socket for the HPS
Peripherals
o
Two port USB 2.0 Host (ULPI interface with USB type A connector)
o
UART to USB (USB Mini B connector)
o
10/100/1000 Ethernet
o
PS/2 mouse/keyboard
o
IR emitter/receiver
o
I2C multiplexer
Connectors
o
Two 40-pin expansion headers
o
One 10-pin ADC input header
o
One LTC connector (one Serial Peripheral Interface (SPI) master ,one I2C bus, and one
GPIO interface)
Summary of Contents for DE1-SoC-MTL2
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