Programming Manual
–
T3AWG3K-C Series Arbitrary Waveform Generator
True-Arb Operating Mode
21
2.2.3
Service Request Enable Register (SRER)
The SRER is made up of bits defined exactly the same as bits 0 through 7 in the SBR as shown
in the following figure. This register is used by the user to determine what events will generate
service requests.
The SRER bit 6 cannot be set. Also, the RQS is not maskable.
The generation of a service request with the GPIB interface involves changing the SRQ line to
LOW and making a service request to the controller. The result is that a status byte for which
an RQS has been set is returned in response to serial polling by the controller.
Use the *SRE command to set the bits of the SRER. Use the *SRE? query to read the contents
of the SRER. Bit 6 must normally be set to 0.
7
6
5
4
3
2
1
0
OSB
--
ESB
MAV
QSB
--
--
--
Table 10: Service Request Enable Register (SRER)
2.2.4
Standard Event Status Block (SESB)
Reports the power on/off state, command errors, and the running state. It consists
of the following registers:
•
Standard Event Status Register (SESR)
•
Event Status Enable Register (ESER)
These registers are made up of the same bits defined in the following table. Use the *ESR?
query to read the contents of the SESR. Use the *ESE() command to access the ESER
2.2.4.1
Standard Event Status Register (SESR)
BIT
Name
Description
7 (MSB)
PON
Power On (PON). Indicates that the power to the
instrument is on.
6
--
Not used.
5
CME
Command Error (CME). Indicates that a command er-
ror has occurred while parsing by the command parser
was in progress.