Glossary
Glossary–8
VX1411A IntelliFrame Mainframe Instruction Manual
Test System
A collection of hardware and software modules that operate in concert to test
a target DUT.
TTLTRG
Open collector TTL lines used for inter-module timing and communication.
VXIbus Subsystem
One mainframe with modules installed. The installed modules include one
module that performs slot 0 functions and a given complement of instrument
modules. The subsystem may also include a Resource Manager.
Word Serial Protocol
A VXIbus word oriented, bi-directional, serial protocol for communications
between message-based devices (that is, devices that include communication
registers in addition to configuration registers).
Word Serial Communications
Inter-device communications using the Word Serial Protocol.
WSP
See Word Serial Protocol.
10-MHz Clock
A 10 MHz,
±
100 ppm timing reference. Also see CLK10.
100-MHz Clock
A 100 MHz,
±
100 ppm clock synchronized with CLK10. Also see CLK100.
488-To-VXIbus Interface
A message based device that provides for communication between the
IEEE-488 bus and VXIbus instrument modules.
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Summary of Contents for VX1411A IntelliFrame VXIbus Mainframe
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