Theory of
Operation—MicroLab
|
Instruction
8-Bit Data Configuration
it
Data Configuration
1K-Byte
|
1K-Byte
Low-Order High-Order
Data
Data
2827-14
Fig.
5-4.
MicroLab
|
Memory Configuration.
Each
1K
block of RAM is
controlled
by a
RAMC
line
from
the personality card.
The
blocks
of RAM
controlled
by RAMCO
and
RAMC1
always
represent
the
low-order
2K
bytes
of
memory, even
when
used
with
a
16-bit personality card. However,
the
RAM
controlled
by
RAMC2
and
RAMC3
are
used
either
as
the
upper
2K
bytes
of
an 8-bit
memory,
or
the
high-order
2K
bytes
of a
16-bit memory.
8-bit
Read.
If
the personality
card
is
going to read
one
of
the two
lower 1K-byte memories
(U6040/U4040
or
U5040/U3040)
a
fairly
straightforward operation takes
place. The
personality
card places
the address
on
BAO—
BAQ
and
forces
the
BR/W
line
high,
indicating
a read. The
personality
card
also indicates
which
1K
memory
pair
is
to
be read
by
asserting either
RAMCO
or
RAMC1.
During a read
operation
to
the
upper
2K
RAM
(U4060/U4050 and U3060/U3050), the
address
is
placed
on
BAO-BAQ,
the
BR/W
line
(upper
left
side
of
schematic
2)
is
high,
and
WD
ACCESS
(in
the
lower
left
corner
of
schematic
2)
is
high.
Now,
the
personality
card
will
force
either
RAMC2 or
RAMC3
low
to
eanble
a
device
pair.
If
RAMC2
is
forced
low, RAMC2
and
BE
create
a
low at
the
output
of U2060D,
which
in
turn causes the output
of
NOR
gate
U4032D
to
go high.
The
output
of
U4032D
is
brought
together with
WD
ACCESS
and
BR/W at
NAND
gate
U5030, forcing
U5030's output
low.
The
low
out
of
U5030
enables
buffer U5060,
and
allows
data
to be
transferred
from
HO-H7
to
the
DO-D7
data
lines,
and
on_to
the
personality card.
Exactly
the
same
thing
happens
if
RAMC3
is
asserted.
8-bit
Write.
For
a
write
operation
to
the
lower
2K,
essentially the same steps
take place.
The
BR/W
line
is
forced
low,
the
write
address
is
placed on
the
address
bus,
anda
memory
pair
is
selected
by RAMCO
or
RAMC1.
Then,
when
BE
is
asserted,
an 8-bit
write
occurs.
Something
different
happens
when
the
upper
2K
is
written
to.
When
writing
to
the upper
2K,
the
personality card
forces
the
BR/W line
low,
and presents
the
address
on
BAO-BA9.
Next,
the
personality card
presents
the data on
DO-D7,
and
then
forces
the
BE
line high.
BE
causes
U5050.
to latch
the
data
from
DO-D7.
Then
the
personality card
forces the
BW/R
line
high at
pin
2
of
U4032A.
This
high,
along with
the
high at
pin
1
(remember,
the
WD
ACCESS
line
is high),
forces the
output enable
pin
(OE) of
U5050
low,
placing
the data
on
HO-H7.
At
this same
time, the
BR/W
line
is
low,
allowing
the
upper
RAM
to
store
the
data.
16-bit
Operation
If
a
16-bit
personality
card
is
used
in
the
MicroLab
|,
the
WD
ACCESS
line
is
forced
low. You'll
notice
that
WD
ACCESS
is
fed
through
an inverter
(U2050C)
and
appears
as
a
high
on
pin
4
of U4032B. And,
WD
ACCESS
appears
asa
lowon
pin
11
of U5030.
Let’s
examine
a
read operation
witha
16-
bit
personality
card
16-bit
Read.
When
the
personality card
wants
to read
16-
bit
memory, buffer
U6060
is
put
to use.
Notice
that
the
low
from
WD
ACCESS
is
fed
through
U5030 to disable buffer
U5060.
When
the
personality
card
is
ready
to
read
(all
other
control
lines
are set
and
stable),
it
asserts
BE.
BE
is
fed
to
pin
12
of
U2060D,
and
to
pin 10 of U2060C.
This
means
that_each time the
personality card
asserts
RAMC2
or
RAMC3,
the
output
of NOR
gate
U4032D
goes
high.
This
high
is
fed to
pin
9
of
U4032C.
When
the
BR/W line goes
high (indicating
a
read),
the high
is
NANDed
with
the
high
from U4032D at
U4032C.
Those
highs
force
the
enabling
pins
of
U6060
low,
allowing
data
to
pass
from
the
memory
devices onto
D8-D15
of
the data
bus.
Atthe same
time,
the
low-order
data
is
placed on
BDO-BD7
whenever
RAMCO
or
RAMC1
is
asserted
16-bit
Write.
About
the same thing happens
when
a
16-bit
personality
card
writes
to
MicroLab
|
RAM.
High-order
data
is
latched
into
U7060
when
the
personality card forces
BE
high. Remember
that
WD
ACCESS
is
low,
appearing
as
a
high on
pin
4
of
U4032B.
When
the
BW/R
line
goes high
(indicating
a
write),
the output
of
U4032B goes
low,
clocking
the data onto
the
HO-H7
data
lines. Then, the
high-order
RAM
pair
is
selected
by RAMC2
or RAMC3,
and
data
is
stored
in RAM.
Summary of Contents for 067-0892-00
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