Technical equipment of TC600 PLC
75
TXV 138 08.02
To determine the IRQ period, that it, the interval between two IRQ's from
the signal at one interrupt input, it is necessary to realize that the IRQ from
signals at individual interrupt inputs are asynchronous towards the program
cycle, and at the same time they may be asynchronous towards one an-
other. If the IRQ is not to be lost, it must hold that:
T
IRQ
t
OP IRQ
T
IRQ
- interrupt period
t
OP IRQ
- maximum response time of the program to the allowed IRQ from
one edge of one signal
Meeting of this condition is illustrated in Fig. 10.4. Allowing of interrupt
from the ascending as well as descending edge of the signal at DI0 is as-
sumed, and of the ascending edge of the signal at input DI1 and descending
edge of the signal at inputs DI2 and DI3.
Signal at
input DIO
Signal at
input DI1
Signal at
input DI2
Signal at
input DI3
Fig. 10.4 Relation among the interrupt period, number of allowed interrupts,
and response time of the program to individual interrupts
To service concurrence of IRQ's from several asynchronous signals, the
PLC is equipped with the IRQ buffer register. If the requirement of the
minimum interrupt period is not met, the stack may overflow and the IRQ
may be lost. This state is signalled by the error message with the code
22 00 00 00 in registers S34 and S48 to S51. Gradual processing of IRQ's
and prolongation of the response time of the program is illustrated in Fig.
10.5.
Cyclicly executed
user program
interrupted by
the P42 process
Signal at
input DIO
Signal at
input DI1
Signal at
input DI2
Signal at
input DI3
Fig. 10.5 Gradual processing of concurrent IRQ's
When using interrupt inputs, it is necessary to keep in mind that evoking
of interrupt processes causes prolongation of the program cycle time which
may even lead to exceeding of the maximum allowed cycle time.
Interrupt period
Processing of
concurrent IRQ's
Prolongation of the
user program cycle
