RGB PROCESSING
MAIN Y, MAIN U, and MAIN V arrive at Pins 2 through 4 of IV001. The MAIN
Y component goes through the white stretch circuit, is output at 56 of IV001,
and is reinjected at 53 of IV001. The three signals are then aligned and sent
to a switch.
The RGBs and FBs from the OSD or Teletext arrive at Pins 50 and 46 through
48 of IV001. They are dematrixed into Y, R-Y, and B-Y, and then inform the
switch.
The switch selects one of these sources via rapid switch FB or Bus I2C.
The selected signals are adjusted for light, contrast, and saturation, and are
then RGB matrixed. The beam lock signal (ABL) arrives at the light and
contrast adjustment stage. This signal comes from Point 1 of the line
transformer, and indicates the tube rate. The AUTO-PIX circuit is an AGC that
compensates for the differences in level between the various sources.
After automatic control of the cutoffs, the signals are amplified and made
available on Outputs 40 through 42 of IV001. The gain of these amplifiers can
be adjusted via Operating Mode (R DRV, G DRV, and B DRV).
The RGBs are then sent to the tube via the transistors (TV063/073/083) and
the amplifiers (IB01, IB02, and IB03).
BEAM LOCK
The beam lock (ABL) voltage arrives at 39 of IV001. It is limited to 6.8 V by
DV101, and to -20 V by DL050.
Light and contrast are not affected if the voltage is above 6 V. If the voltage
falls below 6 V, contrast is limited. If the voltage falls below 4 V, light is limited.
Transistor TV108 uses the PeaK Sense signal to reduce contrast and light
instantaneously in the event of a sudden increase in beam current.
NOTES :
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Summary of Contents for ICC19
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Page 128: ...MEGATEXT OSD CONTENTS PROCESSING OF TELETEXT AND OSD CENTRE DE FORMATION TECHNIQUE 125 125 ...
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