100-Hz DIGITAL PROCESSING
Integrated Circuits IV308 and IV309 are used. The various stages of
processing are as follows:
• Alignment of the Y, U, and V signals (IV308). The signals are input at 26, 24,
and 22 of IV308. The alignment voltage is obtained from the reference
voltage at 25 of IV308. This reference voltage comes from Output 23 of
IV308 via current amplifier TV321/322.
• Analogue-to-digital conversion (IV308), Y = 8 bits, U = 2 bits, V = 2 bits.
The sampling frequency can be 12, 16, or 18 MHz, according to picture and
screen format. Digital samples are available on Outputs 5 through 9 and 12
through 18 of IV308.
• Writing to frame memory (IV309). Signals SWCK, RSTW, and W control this
writing.
- SWCK is the writing clock. Its frequency is identical to the sampling
frequency.
- RSTW resets the writing line counter. This is the VA signal.
- W enables writing. Because of this signal, the line and frame flybacks are
not stored in memory.
NOTES :
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