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© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 0.11 — 25 January 2007
10 of 230
NXP Semiconductors
UOC-TOP-64 N1 series
Signal processor for CRT TV
Fig 2.
Block diagram of the “MONO-90” TV processor
V-
D
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IV
E
EH
T
O
AM DE
MO
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TO
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ISI
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F/A
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A
FC
PLL DEMOD.
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2
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H-
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YP
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CON.
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BLKIN/VGUARD
RGB CONTROL
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BLACK ADJ.
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CONTR/BRIGHTN
RGB MA
TRIX
H/
V
REF
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AY
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SATURATION
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Y
2
YSY
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IFVO
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DE
EMPH
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B3/
BLACK-STRETCH
BCLIN
CLK
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RAT
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2
C-BUS
///
///
//
//
//
CSO
CSI
H/
VD
ISPO
H/
VD
ISPI
CLKI
CLKO
IREFRGB
R/G/B
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INS.
CIRN
CORB
SDA/SCL
IREF
IREFO
CVBSREF
CVBS I
N
RESET
TMSE
L
µ
-PROCESSOR / TELETEXT DECODER / OSD
AM
A
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SCART/
C
INCH
LS/SCART/
C
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A
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W
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-
MIXER
SW
IT
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H
-OU
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SECAM
PEAKING
R3/
G3
/
P
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-3/
Y-
3
C2/
C
3/
C4
CVBS3/ Y3
C2/C3/C4/
CVBS4/Y4
I/O
s
A
V
L/
SS
IF
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FM
DEMOUT
AVL
COR
ING
GAM
M
A
C
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