Supero X7DCT-3, User Manual

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X7DCT-L/X7DCT-LF/X7DCT-3/X7DCT-3F/X7DCT-3IBXF User's Manual
FA
N
3
FA
N
2
FA
N
1
JPL1
JWD1
JPS2
JUSB3
SGPIO1
JF1
JUSB2
X7DCT-L
Rev. 1.2
JWR2
JWR1
JBAT1
SP1
LED2
LED1
LED6
JBT1
JP10
IPMI_LAN
USB0/1
PWR LED
I-Button
SPI_BIOS
I2C_Backplane
I2C_PWR
USB2/3
PCI-E X8
USB4
LED3
PWR_Backplane
PWR1
PWR2
COM
CLEAR
SAS/SA
TA
0
CMOS
CPU1 CPU2
LAN2
VGA
SAS Heatbeat
Battery
DIMM1A DIMM1B
DIMM2A DIMM2B DIMM3A DIMM3B
LED7
BMC
HeartBeat
LAN1
Buzzer
Intel
5100
North Bridge
Intel
ICH9R
South Bridge
InfiniBand
CTRL
CTRL
SAS
CTRL
BMC
CTRL
LAN
Super
IO
InfiniBand
SAS/SA
TA
1
SAS/SA
TA
2
SAS/SA
TA
3
JPB
JPG1
LED9
JIB1
SW1
JPS1
Infi niBand Connection (X7DCT-
3IBXF)
The onboard InfiniBand connector is
located on the backplane on the moth-
erboard. This switch is primarily used for
High-performance computing. See the
table on the right for pin defi nitions.
Infi niBand
Pin Defi nitions
Pin # Defi nition Pin # Defi nition
S1 Input Pair0:Pos S9 Output Pair3:Pos
S2 Input Pair0:Neg S10 Output Pair3:Neg
S3 Input Pair1:Pos S11 Output Pair2:Pos
S4 Input Pair1:Neg S12 Output Pair2:Neg
S5 Input Pair2:Pos S13 Output Pair1:Pos
S6 Input Pair2:Neg S14 Output Pair1:Neg
S7 Input Pair3:Pos S15 Output Pair0:Pos
S8 Input Pair3:Neg S16 Output Pair0:Neg
A
B
G1 G2 G3 G4 G5 G6 G7 G8 G9
S1 S2 S3 S4 S5 S6 S7 S8
S9 S10 S1
1
S12 S13 S14
S15 S16
Infi niBand Ground Pins
(G1~G9) Pin Defi nitions
Pin# Defi nitions
G1~G9 Ground
SGPIO
Pin Defi nitions
Pin# Defi nition Pin Defi nition
1 NC 2 NC
3 Ground 4 DATA Out
5 Load 6 Ground
7 Clock 8 NC
SGPIO Header
A SGPIO (Serial-Link General Purpose
Input/Output) header is located next to
SATA/SAS Port0 on the motherboard.
This header is used to communicate
with the Serial-Link System Monitoring
chip on the backplane. See the table on
the right for pin defi nitions. Refer to the
board layout below for the locations of
the headers.
NC: No Connections
A
A. Infi niBand
B. SGPIO