Chapter 2: Installation
2-29
IDE Connectors
T h e r e a r e n o j u m p e r s t o
configure the onboard IDE#1
and #2 connectors (at J5
and J6, respectively). See
the table on the right for pin
definitions.
Pin Number
Function
1
Reset IDE
3
Host Data 7
5
Host Data 6
7
Host Data 5
9
Host Data 4
11
Host Data 3
13
Host Data 2
15
Host Data 1
17
Host Data 0
19
GND
21
DRQ3
23
I/O W rite-
25
I/O Read-
27
IOCHRDY
29
DACK3-
31
IRQ14
33
Addr 1
35
Addr 0
37
Chip Select 0
39
Activity
Pin Number
Function
2
GND
4
Host Data 8
6
Host Data 9
8
Host Data 10
10
Host Data 11
12
Host Data 12
14
Host Data 13
16
Host Data 14
18
Host Data 15
20
Key
22
GND
24
GND
26
GND
28
BALE
30
GND
32
IOCS16-
34
GND
36
Addr 2
38
Chip Select 1-
40
GND
IDE Connector Pin Definitions
(J5, J6)
GLAN1
®
JLAN1
S
UPER X6DH8-G
GLAN2
DIMM 2A (Bank 2)
DIMM 2B (Bank 2)
DIMM 3A (Bank 3)
DIMM 3B (Bank 3)
DIMM 4A (Bank 4)
DIMM 4B (Bank 4)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
12V 8-pin
PWR
SMBus
PWR
JF
1
FP Control
Fan2
JOH1
OH LED
C
H
Intru
JL1
WD
Enable
IPMI
IDE2
Floppy
COM2
BIOS
Ultra 320
SCSI CH A
Ultra 320 SCSI CH B
Fan4
7902
CTRL
SATA0
SATA1
SMB
PCI-X100 MHz
PCI-X 100 MHz (ZCR)
PCI-X 3 133 MHz
Battery
JPL1
RAGE-
X
PCI-E X8
Lindenhurst
North
Bridge
VGA
COM1
USB0/1
KB/
Mouse
Fan6 Fan5
ATX PWR
12V 4-Pin
PWR
Parrallel Port
J 3 8
24-Pin
Fan7
J1D1
J1B1
JP10
J 1 2
Fan8
J 1 5
SCSI
CPU 0
CPU 1
JWOR1
SI/O
J 3 2
JP11
Alrm
Reset
3rd PS
Detect
PSF
Fan1
Fan3
IDE1
WOR
JPA1
SCSI Enable
PCI-32 Bit 33 MHz
WOL
USB2/3
J11
ICH
JD2
PW LED SPKR
JPG1
VGA
Enable
JWD
VGA
Slot1
Slot2
Slot3
Slot4
JPL2
Slot5
Slot6
PCI-E X8
GLAN
CTLR
GLAN
CTLR
(Hance
Rapids)
J 6
J 5
inter. SPKR
PXH
JBT1
CL CMOS
J
4
F
5
PLLSEL
PS Fail
LED
JFP
Force PW On
J
4
F
4
L
A
N
2
E
n
.
L
A
N
1
E
n
a
b
le
6300 ESB
E7520
IDE1
IDE2