2-14
X6DH8-G/X6DHE-G User's Manual
Serial Ports
The COM1 serial port is located
under the parallel port and COM2
is located below the PCI Slot1
(see the Motherboard layout on
Page 1-4). See the table on the
right for pin definitions.
Serial Port Pin Definitions
(COM1, COM2)
Pin Number
Definition
1
DCD
2
DSR
3
Serial In
4
RTS
5
Serial Out
Pin Number
Definition
6
CTS
7
DTR
8
RI
9
G round
10
NC
Chassis Intrusion
A Chassis Intrusion header is lo-
cated at JL1. Attach the appropri-
ate cable to inform you of a chas-
sis intrusion.
Pin
Number
1
2
Definition
Intrusion Input
Ground
Chassis Intrusion
Pin Definitions (JL1)
GLAN1
®
JL
A
N
1
S
UPER X6DH8-G
GLAN2
DIMM 2A (Bank 2)
DIMM 2B (Bank 2)
DIMM 3A (Bank 3)
DIMM 3B (Bank 3)
DIMM 4A (Bank 4)
DIMM 4B (Bank 4)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
12V 8-pin
PWR
SMBus
PWR
J
F
1
FP Control
Fan2
JOH1
OH LED
CH Intru
JL
1
WD
Enable
IPMI
ID
E2
F
lo
p
p
y
COM2
BIOS
U
ltr
a
3
2
0
SCSI CH A
Ultra 320 SCSI CH B
Fan4
7902
CTRL
SATA0
SATA1
SMB
PCI-X100 MHz
PCI-X 100 MHz (ZCR)
PCI-X 3 133 MHz
Battery
JPL1
RAGE-
X
PCI-E X8
Lindenhurst
North
Bridge
VGA
COM1
USB0/1
KB/
Mouse
Fan6 Fan5
ATX PWR
12V 4-Pin
PWR
Parrallel Port
J 3 8
24-Pin
Fan7
J1D1
J1B1
JP10
J 1 2
Fan8
J 1 5
SCSI
CPU 0
CPU 1
JWOR1
SI/O
J 3 2
JP11
Alrm
Reset
3rd PS
Detect
PSF
Fan1
Fan3
ID
E1
WOR
JPA1
SCSI Enable
PCI-32 Bit 33 MHz
WOL
USB2/3
J11
ICH
JD2
PW LED SPKR
JPG1
VGA
Enable
JWD
VGA
Slot1
Slot2
Slot3
Slot4
JPL2
Slot5
Slot6
PCI-E X8
GLAN
CTLR
GLAN
CTLR
(Hance
Rapids)
J 6
J 5
inter. SPKR
PXH
JBT1
CL CMOS
J4F5
P
L
L
S
E
L
PS Fail
LED
JFP
Force PW On
J4F4
L
A
N
2
E
n
.
L
A
N
1
E
n
a
b
le
6300 ESB
E7520
Chassis Intrusion
COM2
COM1