ix
Table of Contents
Power Configuration
..................................................................................... 4-5
Watch Dog Function ................................................................................... 4-5
Power Button Function ............................................................................... 4-5
Restore on AC Power Loss ........................................................................ 4-5
WOL (Wake-On LAN) Support ................................................................... 4-5
CPU Configuration
....................................................................................... 4-6
Clock Spread Spectrum ............................................................................ 4-6
EIST (GV3) ................................................................................................. 4-6
P-state Coordination ................................................................................... 4-6
TM1 (Available when supported by the CPU.) .......................................... 4-6
TM2 Mode (Available when supported by the CPU.) ................................ 4-6
CPU C-State ............................................................................................... 4-7
Enhanced Halt State (C1E) (Available when "CPU C-States" is set to
Enabled) ..................................................................................................... 4-7
ACPI C2 (Available when "CPU C-States" is set to Enabled) ................... 4-7
Monitor/Mwait ............................................................................................. 4-7
L1 Prefetcher (Available when supported by the CPU) ............................. 4-7
L2 Prefetcher (Available when supported by the CPU) ............................. 4-7
ACPI 3.0 T-States (Available when "CPU C-States" is set to Enabled) .... 4-7
Fast String .................................................................................................. 4-7
Machine Check ........................................................................................... 4-8
Execute Disable Bit (Available if supported by the OS & the CPU) .......... 4-8
VMX (Available when supported by the CPU) ........................................... 4-8
BIST Selection (Available when supported by the CPU) ........................... 4-8
MTRR (Memory Type Range Register) Default as Uncacheable .............. 4-8
Extended APIC ........................................................................................... 4-8
AES-NI ........................................................................................................ 4-8
PECI Enable ............................................................................................... 4-8
PECI Trusted .............................................................................................. 4-8
PECI SMBus Speed ................................................................................... 4-9
Turbo (Available if Intel® EIST technology is Enabled) ............................. 4-9
RAPL .......................................................................................................... 4-9
MSR 606 PKG_POWER_SKU_UNIT ........................................................ 4-9
MSR 610 PKG_TURBO_PWR_LIM ........................................................... 4-9
MSR 670 PKG_TURBO_CFG1 .................................................................. 4-9
MSR 672_TURBO_WKLD_CFG2 .............................................................. 4-9
CPU Core Ratio ......................................................................................... 4-9
Chipset Configuration
................................................................................. 4-10
North Bridge ............................................................................................... 4-10
