Supero 5028R-E1CR12L, User Manual

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S
UPER
S
TORAGE
S
YSTEM 5028R-E1CR12L User's Manual
Figure 1-1. Intel C612 Express Chipset:
System Block Diagram
Note: This is a general block diagram. Please see Chapter 5 for details.
SPI
LAN3
RGRMII
Debug Card
FRONT PANEL
SYSTEM POWER
CTRL
FAN SPEED
PCI-E X1 Gen2
USB 2.0
13 (USB2.0)
1/2/3/4
PCH
Wellsburg
6.0 Gb/S
USB 2.0
LPC
US
B
1
0
SAT
A
5
4
RTL8211E-VB-CG
3
2
RJ45
BIOS
SPI
SPI
Temp Sensor
EMC1402-1 *2 at diff SMBUS
TPM HEADER
USB 3.0
US
B
AST2400
BMC
5/6
7
RMII / NCSI
COM1
Connector
COM2
Header
VGA CONN
BMC Boot Flash
DDR3
5 PHASE
145W
VR12.5
Haswell
PCI-E X8 Gen3
DMI2
PCI-E X8 Gen3
PCI-E X8 Gen3
DMI2
Skt-R3
LGA2011-3
3A
i350
LAN
PCI-E X4 Gen2
C 2
A 2 A 1
67
89
1333/1600/213
3
0-4
0-3
0-2
0-1
DDRI
V
1333/1600/213
3
DDRI
V
0-8
0-7
0-6
0-5
3D
PCIe3.0 x8 SLOT4
LSI SAS3008
PCI-E X8 Gen3
PCIe3.0 X16
( X8 in X16 )
SLOT6
SLOT2
PCIe2.0 x8
(x4 in x8)
PCI-E X4 Gen2
PCI-E X2 Gen2
SLOT3
PCIe2.0 x4
(x2 in x4)
1
2
5
6
01
23
45
67
RJ45
RJ45
PCI-E X4 Gen3
PCIe3.0 X8
( X4 in X8 )
SLOT7
3C
MINI SAS HD
MINI SAS HD
910
1112
PCIe3.0 x8
SLOT5
MUX