Supermicro SUPERSERVER 6018R-TD, User Manual

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Chapter 7: BIOS
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ERVER 6018R-TD User's Manual
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CPU Configuration
This submenu displays the information of the CPU as detected by the BIOS. It also
allows the user to configuration CPU settings.
Socket 1 CPU Information/Socket 2 CPU Information
This submenu displays the following information regarding the CPU installed in
Socket 1 and/or Socket 2 as detected by the BIOS.
•
Processor Socket
•
Processor ID
•
Processor Frequency
•
Processor Maximum Ratio
•
Processor Minimum Ratio
•
Microcode Revision
•
L1 Cache RAM
•
L2 Cache RAM
•
L3 Cache RAM
•
CPU 1 Version
•
CPU 2 Version
Clock Spread Spectrum
Select Enabled to enable Clock Spectrum support, which will allow the BIOS to at-
tempt to reduce the level of electromagnetic interference caused by the components
whenever needed. The options are
Disabled and Enabled.
Hyper-Threading (ALL)
Select Enabled to support Intel Hyper-Threading technology to enhance CPU per-
formance. The options are
Enabled
and Disabled.
Cores Enabled
Set a numeric value to enable the number of cores. (Please refer to Intel's website
for more information.) Enter
0 to enable all cores.
Execute Disable Bit (Available if supported by the OS & the CPU)
Select Enable to enable the Execute-Disable Bit technology which will allow the
processor to designate areas in the system memory where an application code
can execute and where it cannot, thus preventing a worm or a virus from flooding
illegal codes to overwhelm the processor or damage the system during an attack.
The options are
Enable and Disable. (Refer to the Intel and Microsoft websites for
more information.)
PPIN Control
Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in
the system. The options are
Unlock/Enable and Unlock/Disable.
Hardware Prefetcher (Available when supported by the CPU)
If set to Enable, the hardware prefetcher will prefetch streams of data and instruc-
tions from the main memory to the L2 cache to improve CPU performance. The
options are Disable and
Enable .
Adjacent Cache Prefetch (Available when supported by the CPU)
If this feature is set to Disable, the CPU prefetches the cache line for 64 bytes. If
this feature is set to
Enable , the CPU prefetches both cache lines for 128 bytes as
comprised. The options are Disable and Enable .
DCU Streamer Prefetcher (Available when supported by the CPU)
Select Enable to enable the DCU (Data Cache Unit) Streamer Prefetcher, which
will stream and prefetch data and send it to the Level 1 data cache to improve data
processing and system performance. The options are Disable and
Enable .
DCU IP Prefetcher (Available when supported by the CPU)
Select Enable for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch
IP addresses to improve network connectivity and system performance. The options
are Disable and
Enable
.
Direct Cache Access (DCA)
Select Enable to use Intel's DCA (Direct Cache Access) technology to improve data
transfer efficiency. The options are Disable, Enable, and Auto .
X2APIC
Select Enable to activate APIC (Advanced Programmable Interrupt Controller) sup-
port. The options are Enable and
Disable .
AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc-
tions (NI) to ensure data security. The options are Enable and
Disable
.