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SUPERSERVER 5017R-iHDP User's Manual
Chipset Configuration
WARNING:
Setting the wrong values in the following sections may cause the system
to malfunction.
CPU Bridge Configuration
This item displays the current CPU Revision, Current CPU1 Memory Frequency,
Memory Type and Memory Reference Code Revision.
Memory Frequency
This feature allows the user to select the memory speed. Under normal condi-
tions, please set this to Auto. The options are Auto, Force DDR-1066, Force
DDR-1333, and Force DDR-1600.
Integrated I/O Configuration
This item displays the current North Bridge Revision.
Intel VT-d
Select Enabled to enable Intel's Virtualization Technology support for Direct I/O
VT-d
by reporting the I/O device assignments to VMM through the DMAR ACPI
Tables. This feature offers fully-protected I/O resource-sharing across the Intel
platforms, providing the user with greater reliability, security and availability in
networking and data-sharing. The settings are Enabled and
Disabled
.
Active State Power Management
Select Enabled to start Active-State Power Management for signal transactions
between L0 and L1 Links on the PCI Express Bus. This maximizes power-saving
and transaction speed. The options are Enabled and
Disabled
.
PCIE Maximum Read Request
This feature selects the setting for the PCIE maximum payload size. The op-
tions are
Auto,
128 Bytes
,
256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and
4096 Bytes
.
PCI Express Port
This feature enables or disables the PCI Express port. The options are Disabled,
Enabled and
Auto.
PCI Express Port - Gen X
Use this feature to select the speed of PEG. The options are
Auto
, Gen1, Gen2,
and Gen3.
Summary of Contents for SC816LTS-655BP
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