Supermicro 8048B-TR4FT, User Manual

Page: 109 / 135

7-16
SUPERSERVER 8048B-TR4FT USER'S MANUAL
3DS LRDIMM (Load-Reduction DIMM) Module Delay
When this item is set to Disabled, the MRC (Memory Regulator Controller) will not
use SPD bytes 90-95 for module delay on 3DS LRDIMM memory. The options
are Disabled and Auto.
Data Scrambling
Select Enabled to enable data scrambling to enhance system performance and
data integrity. The options are Disabled and Enabled .
VMSE Lockstep Mode
Select Enabled to support the VMSE Lockstep mode, which will support Lock
step mode for the Intel Scalable Memory Interconnect 2 (Intel SMI 2) controller.
The options are 2:1 Mode and 1:1 Mode.
HA (Hash Mode) Early Write Post Mode
Select Enable to support memory hash-method-comparison mode when the
system is running at the early stage of POST (Power-On-Self-Test). The options
are is Enable and Disable.
Command 2 Data Tuning
Select Enabled to fi ne-tune electrical command paths from the host system to
the memory-extension buffer (MXB). The options are Enabled and Disabled.
Closed Loop Thermal Throttling
Select Enabled to support Closed-Loop Thermal Throttling which will improve
reliability and reduces CPU power consumption via automatic voltage control
while the CPU are in idle states. The options are Disabled and Enabled.

Memory Topology
This item displays the status of each DIMM module as detected by the BIOS.
•
Memory Buffer Controller
•
Memory Channel
•
DIMM Frequency