SIS Documentation
SIS3820
VME Scaler
Page 44 of 79
7.23 Inhibit/count disable register (0x200)
#define SIS3820_INHIBIT 0x200 /* read/write; D32 */
This read/write register is used for software inhibit of individual channels or arbitrary channel
groups. The inhibit condition is an OR of the front panel inhibit (where activated) and the
inhibit register.
Bit Function
31
0: enable /1: inhibit channel 32 counting
... ...
0
0: enable /1: inhibit channel 1 counting
At power up or after key reset the register the register will read 0, i.e. all scaler channels are
active.
7.24 Counter clear register (0x204)
#define SIS3820_COUNTER_CLEAR
0x204
/* write only; D32 */
On write access to this register each channel can be cleared individually by the setting of the
corresponding bit.
Bit write
Function
31
1: clear channel 32
... ...
0
1: clear channel 1
7.25 Counter Overflow register (0x208)
#define SIS3820_COUNTER_OVERFLOW
0x208
/* read/write; D32 */
This register holds the information on which channel has run into overflow condition.
On write access to this register the overflow bits of each channel can be cleared individually
by the setting of the corresponding bit.
Bit
write Function
read Function
31
1: clear overflow bit of channel 32
Status of Overflow bit of channel 32
... ...
...
0
1: clear overflow bit of channel 1
Status of Overflow bit of channel 1