SIS Documentation
SIS3800
Scaler/Counter
Page 14 of 39
8 Register
Description
8.1 Status Register (0x0)
The status register reflects the current settings of most of the SIS3800 parameters in read
access, in write access it functions as the control register.
Bit
Function
31
0
30
Status VME IRQ source 2 (test IRQ)
29
Status VME IRQ source 1 (ext. clock shadow)
28
Status VME IRQ source 0 (Overflow)
27
VME IRQ
26
internal VME IRQ
25
0
24
0
23
0
22
Status VME IRQ Enable Bit Source 2
21
Status VME IRQ Enable Bit Source 1
20
Status VME IRQ Enable Bit Source 0
19
0
18
0
17
0
16
reserved (read back as 0 at power up)
15
Global Count Enable
14
General Overflow Bit
13
Status enable reference pulser channel 1
12
0
11
0
10
0
9
0
8
0
7
Status broadcast mode handshake controller
6
Status broadcast mode
5
Status input test mode
4
Status 25 MHz test pulses
3
Status input mode bit 1
2
Status input mode bit 0
1
Status IRQ source 2 for software IRQ testing
0
Status user LED
The reading of the status register after power up or key reset is 0x0 (see default settings of
control register).
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