Step Technica MKY02, User Manual

Page: 66 / 73

MKY02 User’s Manual
(for Hi-speed Link System)
5 - 4
5.2.1 Clock and Reset Timing
Input the clock output from AXS0 pin, to AX0 pin.
Input the clock output from AXS1 pin, to AX1 pin.
Input the clock output from AXS2 pin, to AX2 pin.
Symbol Name Min. Max. Unit
T
XI
Clock period width 20 --- ns
T
XIH
Clock High level width 5 --- ns
T
XIL
Clock Low level width 5 --- ns
T
RST
Reset enable Low level width 10 × T
AX0
--- ns
BPS1 pin BPS0 pin T
AXS0:
T
AX0
T
AXS1:
T
AX1
T
AXS2:
T
AX2
Unit Remarks (Xi = 48 MHz)
Hi Hi T
XI
4
×
T
XI
8
×
T
XI
ns 12 Mbps
Hi Lo 2
×
T
XI
8
×
T
XI
16
×
T
XI
ns 6 Mbps
Lo Hi 4
×
T
XI
16
×
T
XI
32
×
T
XI
ns 3 Mbps
Lo Lo 8
×
T
XI
32
×
T
XI
64
×
T
XI
ns 1.5 Mbps