Step Technica MKY02, User Manual

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Chapter 3 Single Connection of MKY02
3 - 5
3.2 Supplying Driving Clock and Hardware Reset Signal
This section describes how to supply a clock that drives the MKY02 and the hardware reset signal.
3.2.1 Supplying Driving Clock
Connect an oscillator-generated 48-MHz clock to the Xi pin (pin 34) of the MKY02 for driving clock. The
specifications for supplying an external clock to the Xi pin are as follows:
(1) The upper frequency limit is 50 MHz and there is no lower frequency limit.
(2) For the electrical specifications of the Xi pin, refer to
“Chapter 2 MKY02 Hardware” .
(3) Connect a clock with a signal rise and fall time of 20 ns or less.
(4) Connect a clock with a minimum High-level or Low-level time of 5 ns or more.
(5) Connect a clock with a jitter component of:
•
250 ps or less at input frequency of 25 MHz or more
•
500 ps or less at input frequency of less than 25 MHz
(6) Connect a clock with a frequency accuracy of
±
200 ppm or better.
A clock output by a commonly-used crystal oscillator meets the conditions (2) to (6) above.