Stanford Research Systems SR860, Operation Manual

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Appendix H Circuit Description 203
SR860 DSP Lock-in Amplifier
module (J6) and the Sine Out module (J8) are not interchangeable — these subassemblies
have different power requirements and must be cabled correctly. 24 VDC is tapped from
the motherboard connector to header J9 for powering the small cooling fan mounted to
the heat sink. Serial SPI control signals are routed from the motherboard to each front-
end module (Preamp, Ref In, and Sine Out) through the regulator board; signals come in
via J7, and are bussed to pins 4, 5, 8, and 9 of the power/control connectors J2, J6, and J8.
While each set of related voltage rails has a separate ground network, all of these grounds
are loosely tied to chassis ground through resistors R31–R36 (10 k
Ω each) to avoid any
supplies “drifting away” during testing before connection to their loads. Probing of the
output voltage levels is best accomplished from test point array TP1–TP20; these test
points are protected through 4.7 k
Ω resistors to avoid arcing if accidentally shorted.