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L6917B

ELECTRICAL CHARACTERISTICS 
V

CC

 = 12V ±10%, T

J

 = 0 to 70°C unless otherwise specified

Symbol

Parameter

Test Condition

Min

Typ

Max

Unit

Vcc SUPPLY CURRENT

I

CC

Vcc supply current

HGATEx and LGATEx open
V

CCDR

=V

BOOT

=12V

7.5

10

12.5

mA

I

CCDR

V

CCDR

 supply current

LGATEx open; V

CCDR

=12V

2

3

4

mA

I

BOOTx

Boot supply current

HGATEx open; PHASEx to PGND
V

CC

=V

BOOT

=12V

0.5

1

1.5

mA

POWER-ON

Turn-On V

CC

 threshold

V

CC

 Rising; V

CCDR

=5V

7.8

9

10.2

V

Turn-Off V

CC

 threshold

V

CC

 Falling; V

CCDR

=5V

6.5

7.5

8.5

V

Turn-On V

CCDR

Threshold

V

CCDR

 Rising 

V

CC

=12V

4.2

4.4

4.6

V

Turn-Off V

CCDR

Threshold

V

CCDR

 Falling 

V

CC

=12V

4.0

4.2

4.4

V

OSCILLATOR/INHIBIT/FAULT

f

OSC

Initial Accuracy

OSC = OPEN
OSC = OPEN; Tj=0

°

C to 125

°

C

278
270

300

322
330

kHz
kHz

f

OSC,Rosc

Total Accuracy

R

T

 to GND=74k

450

500

550

kHz

INH

Inhibit threshold

I

SINK

=5mA

0.8

0.85

0.9

V

d

MAX

Maximum duty cycle

OSC = OPEN

70

75

%

Vosc

Ramp Amplitude

1.8

2

2.2

V

FAULT

Voltage at pin OSC

OVP or UVP Active 

4.75

5.0

5.25

V

REFERENCE AND DAC

Output Voltage
Accuracy

VID0, VID1, VID2, VID3, VID4 
see Table1;
FBR = V

OUT

; FBG = GND

-0.8

-

0.8

%

I

DAC

VID pull-up Current

VIDx = GND

4

5

6

µ

A

VID pull-up Voltage

VIDx = OPEN

3.1

-

3.4

V

ERROR AMPLIFIER 

DC Gain

80

dB

SR

Slew-Rate

COMP=10pF

15

V/

µ

s

DIFFERENTIAL AMPLIFIER (REMOTE BUFFER)

DC Gain

1

V/V

CMRR

Common Mode Rejection Ratio

40

dB

      Obsolete Product(s) - Obsolete Product(s)

Summary of Contents for L6917BD

Page 1: ...age from 1 100V to 1 850V with 25mV binary steps The high precision internal reference assures the se lected output voltage to be within 0 8 The high peak current gate drive affords to have fast switching to the external power mos providing low switching losses The device assures a fast protection against load over current and load over under voltage An internal crowbar is provided turning on the ...

Page 2: ...00kHz 26 V Symbol Parameter Value Unit Rth j amb Thermal Resistance Junction to Ambient 60 C W Tmax Maximum junction temperature 150 C Tstorage Storage temperature range 40 to 150 C Tj Junction Temperature Range 25 to 125 C PMAX Max power dissipation at Tamb 25 C 2 W LGATE1 VCCDR PHASE1 VID3 VID2 VID1 FB BOOT1 UGATE1 VID4 BOOT2 PGOOD UGATE2 PHASE2 LGATE2 PGND 1 3 2 4 5 6 7 8 9 18 17 16 15 19 20 10...

Page 3: ... 4 4 6 V Turn Off VCCDR Threshold VCCDR Falling VCC 12V 4 0 4 2 4 4 V OSCILLATOR INHIBIT FAULT fOSC Initial Accuracy OSC OPEN OSC OPEN Tj 0 C to 125 C 278 270 300 322 330 kHz kHz fOSC Rosc Total Accuracy RT to GND 74kΩ 450 500 550 kHz INH Inhibit threshold ISINK 5mA 0 8 0 85 0 9 V dMAX Maximum duty cycle OSC OPEN 70 75 Vosc Ramp Amplitude 1 8 2 2 2 V FAULT Voltage at pin OSC OVP or UVP Active 4 75...

Page 4: ... RHGATEx High Side Sink Resistance VBOOTx VPHASEx 12V 1 5 2 2 5 Ω tRISE LGATE Low Side Rise Time VCCDR 10V CLGATEx to PGNDx 5 6nF 30 55 ns ILGATEx Low Side Source Current VCCDR 10V 1 8 A RLGATEx Low Side Sink Resistance VCCDR 12V 0 7 1 1 1 5 Ω P GOOD and OVP UVP PROTECTIONS PGOOD Upper Threshold VSEN DACOUT VSEN Rising 108 112 116 PGOOD Lower Threshold VSEN DACOUT VSEN Falling 84 88 92 OVP Over Vo...

Page 5: ... 0 0 0 1 250 1 0 1 1 1 1 275 1 0 1 1 0 1 300 1 0 1 0 1 1 325 1 0 1 0 0 1 350 1 0 0 1 1 1 375 1 0 0 1 0 1 400 1 0 0 0 1 1 425 1 0 0 0 0 1 450 0 1 1 1 1 1 475 0 1 1 1 0 1 500 0 1 1 0 1 1 525 0 1 1 0 0 1 550 0 1 0 1 1 1 575 0 1 0 1 0 1 600 0 1 0 0 1 1 625 0 1 0 0 0 1 650 0 0 1 1 1 1 675 0 0 1 1 0 1 700 0 0 1 0 1 1 725 0 0 1 0 0 1 750 0 0 0 1 1 1 775 0 0 0 1 0 1 800 0 0 0 0 1 1 825 0 0 0 0 0 1 850 Obs...

Page 6: ...f no Remote Sense is implemented connect it directly to the regulated voltage in order to manage OVP UVP and PGOOD 11 FBR Remote sense buffer non inverting input It has to be connected to the positive side of the load to perform a remote sense If no remote sense is implemented connect directly to the output voltage in this case connect also the VSEN pin directly to the output regulated voltage 12 ...

Page 7: ... voltage is detected This condition is latched to recover it is necessary turn off and on VCC 18 22 VID4 0 Voltage IDentification pins These input are internally pulled up and TTL compatible They are used to program the output voltage as specified in Table 1 and to set the power good thresholds Connect to GND to program a 0 while leave floating to program a 1 23 PGOOD This pin is an open collector...

Page 8: ... of the inductors current triangular wave form When an under voltage is detected the device latches and the FAULT pin is driven high The device per forms also over voltage protection that disable immediately the device turning ON the lower driver and driving high the FAULT pin Oscillator The device has been designed in order to operate an each phase at the same switching frequency of the internal ...

Page 9: ...olds Soft Start and INHIBIT At start up a ramp is generated increasing the loop reference from 0V to the final value programmed by VID in 2048 clock periods as shown in figure 2 Before soft start the lower power MOS are turned ON after that VCCDR reaches 2V independently by Vcc value to discharge the output capacitor and to protect the load from high side mosfet failures Once soft start begins the...

Page 10: ...the inductor to recirculate This mechanism allows the system to regulate even if the current is negative The BOOTx and VCCDR pins are separated from IC s power supply VCC pin as well as signal ground SGND pin and power ground PGND pin in order to maximize the switching noise immunity The separated supply for the different drivers gives high flexibility in mosfet choice allowing the use of logic le...

Page 11: ...s the current carried by each phase and in particular the current measured in the middle of the oscillator period The current information reproduced internally is represented by the second term of the previous equation as follow Since the current is read in differential mode also negative current information is kept this allow the device to check for dangerous returning current between the two pha...

Page 12: ...t it can be determined as follow Where INOM is the nominal current and VoutMIN is the minimum output voltage VID 40 as explained below The device works in Constant Current and the output voltage decreases as the load increase until the output voltage reaches the under voltage threshold VoutMIN When this threshold is crossed all mosfets are turned off the FAULT pin is driven high and the device sto...

Page 13: ...the FB pin Connecting a resistor between this pin and Vout the total current information flows only in this resistor because the compensation network between FB and COMP has always a capacitor in series See fig 7 The voltage regulated is then equal to VOUT VID RFB IFB Since IFB depends on the current information about the two phases the output characteristic vs load current is given by Figure 6 Ou...

Page 14: ...sense buffer is integrated into the device to allow output voltage remote sense implementation without any additional external components In this way the output voltage programmed is regulated between the re mote buffer inputs compensating motherboard trace losses or connector losses if the device is used for a VRM module The very low offset amplifier senses the output voltage remotely through the...

Page 15: ...nt slope is limited by the inductor value The output voltage has a first drop due to the current variation inside the capacitor neglecting the effect of the ESL VOUT IOUT ESR A minimum capacitor value is required to sustain the current during the load transient without discharge it The voltage drop due to the output capacitor discharge is given by the following equation Where DMAX is the maximum d...

Page 16: ...p and the Average Current Mode con trol loop Each loop gives with a proper gain the correction to the PWM in order to minimize the error in its regulation the Current Sharing control loop equalize the currents in the inductors while the Average Current Mode control loop fixes the output voltage equal to the reference programmed by VID Figure 10 reports the block diagram of the main control loop Fi...

Page 17: ...ng a voltage offset equal to 2mV across the sense resistor the cur rent reading error is given by the following equation Where IREAD is the difference between one phase current and the ideal current IMAX 2 For Rsense 4mΩ and Imax 40A the current sharing error is equal to 2 5 neglecting errors due to Rg and Rsense mismatches Figure 11 Current Sharing Control Loop Average Current Mode ACM Control Lo...

Page 18: ...y ESR and the Droop resistance To obtain the desired shape an RF CF series network is consid ered for the ZF s implementation A zero at ωF 1 RFCF is then introduced together with an integrator This in tegrator minimizes the static error while placing the zero in correspondence with the L C resonance a simple 20dB dec shape of the gain is assured See Figure 12 In fact considering the usual value fo...

Page 19: ...thick copper traces The critical components i e the power transistors must be located as close as possible together and to the controller Considering that the electrical components re ported in fig 13 are composed by more than one physical component a ground plane or star grounding con nection is suggested to minimize effects due to multiple connections Figure 13 Power connections and related conn...

Page 20: ...ft and sense nets routing right The placement of other components is also important The bootstrap capacitor must be placed as close as possible to the BOOTx and PHASEx pins to mini mize the loop that is created Decoupling capacitor from Vcc and SGND placed as close as possible to the involved pins Decoupling capacitor from VCCDR and PGND placed as close as possible to those pins This capacitor sus...

Page 21: ...te anyway to the LS mosfet source together with ISENx net Right and wrong connections are reported in Figure 15 Symmetrical layout is also suggested to avoid any unbalance between the two phases of the converter Figure 15 PCB layout connections for sense nets APPLICATION EXAMPLES The dual pahse topology can be applied to several different applications ranging from CPU power supply for which the de...

Page 22: ...ly voltage Anyway power conversion starts from VIN and the device is supplied from VCC See Figure 17 Figure 17 Power supply configuration Two main configurations can be distinguished Single Supply VCC VIN 12V and Double Supply VCC 12V VIN 5V or different PGOOD PGND PGNDS2 ISEN2 LGATE2 VSEN FB PHASE2 UGATE2 BOOT2 VCC COMP SGND OSC INH VID0 VID1 VID2 VID3 VID4 PGNDS1 ISEN1 LGATE1 PHASE1 UGATE1 BOOT1...

Page 23: ...ntly from the 5V bus Typ or from other buses allowing maximum flexibility in the power conversion Supply for the mosfet driver can be programmed through the jumpers JP1 JP2 and JP6 as previously illustrated JP6 selects now VCC or VIN depending on the requirements Some examples are reported in the following Figures 18 and 19 Figure 18 Jumpers configuration Double Supply Figure 19 Jumpers configurat...

Page 24: ... Product s L6917B 24 33 PCB and Components Layouts Figure 20 PCB and Components Layouts Figure 21 PCB and Components Layouts Component Side Internal PGND Plane Internal SGND Plane Solder Side Obsolete Product s Obsolete Product s ...

Page 25: ...urrent across the low side mos fet RdsON STB90NF03L has 6 5mΩ max at 25 C that becomes 9 1mΩ considering the temperature variation 40 the resulting Tran conductance resistor Rg has to be R3 to R6 Droop function Design Considering a voltage drop of 100mv at full load the feedback resistor RFB has to be R7 Inductor design Each phase has to deliver up to 22 5A considering a current ripple of 5A 25 th...

Page 26: ...D 0805 R12 to R16 R19 2 2Ω SMD 0805 R17 R18 0Ω SMD 0805 C2 15n SMD 0805 C3 C4 100n SMD 0805 C5 C6 C7 1µ Ceramic SMD 1206 C8 C9 C10 10µ Ceramic SMD 1206 C11 C12 C13 1800µ 16V Rubycon MBZ Radial 23x10 5 C19 to C24 2200µ 6 3V Rubycon MBZ Radial 23x10 5 L1 L2 1µ TO50 52B 6 Turns U1 L6917B STMicroelectronics SO28 Q1 Q3 STB90NF03L STMicroelectronics D2PACK Q2 Q4 STB70NF03L STMicroelectronics D2 PACK D1 ...

Page 27: ...st R1 10k SMD 0805 R2 R9 Not Mounted SMD 0805 R3 R4 R5 R6 3 3k 1 SMD 0805 R7 3 6k 1 SMD 0805 R8 3 3k SMD 0805 R10 82 SMD 0805 R12 to R15 2 2 SMD 0805 R16 R17 R18 0 SMD 0805 Ra 1k SMD 0805 Rosc 1 3M 1 SMD 0805 C1 Not Mounted SMD 0805 PGOOD PGND PGNDS2 ISEN2 LGATE2 VSEN FB PHASE2 UGATE2 BOOT2 VCC COMP SGND OSC INH VID0 VID1 VID2 VID3 VID4 PGNDS1 ISEN1 LGATE1 PHASE1 UGATE1 BOOT1 VCCDR 6 24 25 26 27 1...

Page 28: ...6 C11 to C13 1800µ 16V Rubycon MBZ Radial 10x10 5 C14 to C23 2200µ 6 3V Rubycon MBZ Radial 10x10 5 Ca 68n SMD 0805 L1 L2 0 5µ 77121 Core 3 Turns U1 L6917B STMicroelectronics SO28 Q1 Q1a Q3 Q3a SUB85N03 04P Vishay Siliconix D2PACK Q2 Q4 SUB70N03 09BP Vishay Siliconix D2PACK D1 D2 STPS340U STMicroelectronics SMB D3 D4 1N4148 STMicroelectronics SOT23 Part List continued 75 77 79 81 83 85 87 89 0 5 10...

Page 29: ...ansient Response Figure 26 shows the system response from 0 to 50A load transient To obtain such a response 5 additional capacitors have been added to the output filter to reproduce the motherboard output filter Noise can be further reduced by adding ceramic decoupling capacitors Figure 26 1 7V Output Voltage Ripple During 0 to 50A Load Transient Obsolete Product s Obsolete Product s ...

Page 30: ...nversion especially in the 5V conversion where the duty cycle is near the 50 and practically no ripple is present in the input capacitors The board is able to deliver up to 35A thermal at Tamb 25 C without airflow Higher currents can be reached for reasonable times considering the overall dynamic thermal capacitance Figure 27 Server power supply schematic The following part list refers to the foll...

Page 31: ...ramic SMD 1206 C9 C10 10µ Ceramic SMD 1206 C11 to C13 100µ 20V OSCON 20SA100M Radial 10x10 5 C14 C16 C18 C20 C22 2200µ 16V SANYO Radial 10x23 L1 L2 2 8µ 77121 Core 9 Turns U1 L6917B STMicroelectronics SO28 Q1 Q1a Q2 Q3 Q3a Q4 STB90NF03L STMicroelectronics D2 PACK D1 D2 STPS340U STMicroelectronics SMB D3 D4 1N4148 STMicroelectronics SOT23 DZ1 Not Mounted Minimelf Figure 28 System Efficiency for a 1...

Page 32: ... 65 0 104 a1 0 1 0 3 0 004 0 012 b 0 35 0 49 0 014 0 019 b1 0 23 0 32 0 009 0 013 C 0 5 0 020 c1 45 typ D 17 7 18 1 0 697 0 713 E 10 10 65 0 394 0 419 e 1 27 0 050 e3 16 51 0 65 F 7 4 7 6 0 291 0 299 L 0 4 1 27 0 016 0 050 S 8 max OUTLINE AND MECHANICAL DATA Obsolete Product s Obsolete Product s ...

Page 33: ...tion are subject to change without notice This publication supersedes and replaces all information previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics The ST logo is a registered trademark of STMicroelectronics 2002 STMicroelectronics All Rights Reserved STMicroel...

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