60
the counter clock for loading the RAM contents with a pattern, and
5_MHz as the clock during integration. Flip-flop U507A is used to
synchronize the start of the timing cycle with the Group Repetition
Interval (GRI) of the LORAN chain being monitored, as well as to load
the counters synchronously with the 100 kHz clock signal.
Two rear-panel outputs are provided to facilitate viewing the receiver
output and tracking point. J501 is the "GRI OUT" output, and during
receiver lock provides a 10
µ
sec wide negative-going pulse 500 msec
ahead of the third zero-crossing tracking point. J502 is the "GATE
OUT" output, and during receiver lock provides a 10
µ
sec wide
negative-going pulse coincident with the third zero-crossing tracking
point.
A/D, D/A Converters (p. 7/14)
There is one 8-bit analog-to-digital converter and one 8-bit and one 16-
bit digital-to-analog converter used in the FS700. The 16-bit serial DAC
(U604) is used to generate an analog voltage that is used to discipline
the internal 10 MHz oscillator. P601 is used to trim the MSB differential
non-linearity of the DAC.
The 8-bit DAC (1/2 of U603) generates an analog control voltage to
control the contrast of the front panel LCD. This voltage is buffered
and multiplied to ± 5 V by U605A. The other half of U603 is an 8-bit
A/D converter used to digitize the four gated integrator outputs, the
output of the front-end detector, the V_PHASE output from the phase
detector, and the V_ANT signal from the front end peak detector. The
signal to be digitized is selected by multiplexer U602 and buffered and
level shifted by U605C and U605D and then fed to the A/D converter.
Clocks and Clock Outputs (p. 8/14)
The standard timebase is an ovenized voltage-controlled crystal
oscillator that connects to J705 and provides a 10 MHz sine wave
output. This oscillator exhibits 5 x 10
-10
per day aging and 2 x 10
-7
stability over 0° - 50° C. In place of the standard oscillator, a higher
short-term stability SC cut ovenized oscillator is available.
The 10 MHz sine wave from the installed oscillator is coupled to Q701
which in turn couples to emitter followers U703A-U703D. These
transistors couple the 10 MHz reference to the rear panel outputs
through the 10 MHz tanks (C702 and L701 typical of all four outputs).
This provides a clean 10 MHz, 1 V rms sine wave into a 50 ohm load.
The 10 MHz output is also buffered through Q702 to U701, a high-
speed comparator which provides the 10 MHz clock used by the
system.
Phase Comparators / Frequency Output (p. 9/14)
