PulseBlasterESR-PRO-200-cPCI
HW_Reset (pin 1):
When low voltage is detected (e.g., when shorting pins 1 and 3), program execution
will be halted. The device resets itself back to the beginning of the program. Program execution can be
resumed by either a software start command or by a hardware trigger.
Clock Oscillator Header
The PulseBlasterESR-cPCI comes with a crystal oscillator mounted at the designated “Clock” header
to provide a timing signal for the board. If required, it is possible to remove the oscillator that comes standard,
and instead drive the PulseBlasterESR-cPCI with an external clock signal. The oscillator module can be
removed from the board, and an external signal can be input through the header pins. Do not attempt to drive
a PulseBlaster board with an external clock while an oscillator module is also connected. The standard clock
oscillator’s orientation should be noted - if the clock oscillator is reconnected, it must be inserted in the same
orientation or board damage may occur. The external clock signal must be a TTL square wave, i.e. a digital
signal of no more than 3.3 V. This is the absolute maximum allowable voltage, typically a voltage of 1.5-2 V is
sufficient. Be aware that the TTL signal must be a positive-only signal, any negative voltage will damage the
programmable-logic chip.
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Figure 12:
Demonstration of HW_Trigger signal. The blue shows the
HW_Trigger signal, the pink shows one of the output flags. A latency of 80
ns is shown in this figure. Please refer to the Instruction Set Architecture
section in Appendix I for more details on programming the duration of the
WAIT latency. To trigger once, the trigger signal must begin at high voltage
(between 2V and 3.3V), then must be pulled low (to ground) and stay low
for at least 50 ns before returning to high voltage. The PulseBlaster will
continue to trigger or reset for as long as the HW_Trigger or HW_Reset
signals stay at ground.
Caution: applying voltages to the input pins
that are greater than 3.3V or less than 0V will damage the board.
