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PCI.212 Manual
31.03.2004
Page 21 of 25
Triggerlevel register
register name
reg no.
r/w
SPC_TRIGGERLEVEL
42000
w
triggerlevel for the triggermodes TM_CH0/1POS/NEG
The triggerlevel is an 8 bit value which will be compared with the upper 8 bit of the ADC data. For this the voltage triggerlevel depends
on the selected inputrange.
value
triggerlevel
input range:
± 1 V
input range:
± 500 mV
255
+ (255-128) /128 * range
992 mV
496 mV
254
+ (254-128) /128 * range
984 mV
492 mV
253
+ (253-128) /128 * range
977 mV
488 mV
..
..
..
..
129
+ (129-128) /128 * range
8 mV
4 mV
128
0 mV
0 mV
127
- (128-127) /128 * range
-8 mV
-4 mV
..
..
..
..
2
- (128-2) /128 * range
-984 mV
-492 mV
1
- (128-1) /128 * range
-992 mV
-496 mV
Allowed values are in the range from 1 to 255.
Triggeroffset register
Due to the internal structure of the memory sub-system sampling could only be stopped every 2nd. sample (in 80 MHz mode every 4th.
sample). For this there may be an 2 samples (4 samples) jitter in the trigger. If it is necessary to know the exact trigger sample, this offset
could be read out and data could be synchronized. In 80 MHz there is a 1 sample trigger jitter because the trigger controller only runs
with 40 MHz.
register name
reg no.
r/w
SPC_TRIGGEROFFSET
45000
r
Triggeroffset in samples. Positive values mean that the found triggerevent is xx samples after
the real triggerevent. Negative values mean that the found triggerevent is xx samples before
the real triggerevent.
Samplerate register
Sets the samplerate for recording.
register name
reg no.
r/w
SPC_SAMPLERATE
20000
w
samplerate between 312 kHz and 80 MHz
The value is a 32 bit integer in the range from 40 MHz down to 312 kHz using an 8 bit divider or the value 80 MHz. Possible values are:
80 MHz, 40 MHz, 80 MHz/4 = 20 MHz, 80 MHz/6 = 13.33 MHz, 80 MHz/8 = 10 MHz, ..., 80 MHz/256 = 312 kHz