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MI.61xx Manual

Hardware information

Introduction

Clock and Filter

Dynamic Parameters

Dynamic parameters are measured at the given output level and 50 Ohm termination with a high resolution data acquisition card and are calculated from the spectrum. The sample rate
that is selected is the maximum possible one. All available channels are activated for the tests. SNR and SFDR figures may differ depending on the quality of the used PC. SNR = Signal to
Noise Ratio, THD = Total Harmonic Distortion, SFDR = Spurious Free Dynamic Range

Order information

MI.6110

MI.6111

max internal clock

125 MS/s

max external clock

125 MS/s

-3 dB bandwidth no filter

> 60 MHz

Filter 3: Characteristics

5th order Butterworth

Filter 3: -3 dB bandwidth

25 MHz (typ. 25.6 MHz)

Filter 2: Characteristics

4th order Butterworth

Filter 2: -3 dB bandwidth

5 MHz (typ. 5.8 MHz)

Filter 1: Characteristics

4th order Butterworth

Filter 1: -3 dB bandwidth

500 kHz (typ. 495 kHz)

MI.6110
MI.6111

Test - Samplerate

125 MS/s

Output Frequency

400 kHz

4 MHz

Output Level

±2 V

Used Filter

500 kHz

5 MHz

SNR (typ)

> 60.9 dB

> 55.2 dB

THD (typ)

< -69.1 dB

< -58.08 dB

SFDR (typ), excl harm.

> 71.9 dB

> 65.6 dB

Order No

Description

Order No

Description

MI6110

MI.6111 with 16 MSample memory and drivers/SBench 5.x

MI61xx-32M

Option: 32 MSample mem instead of 16 MSample standard mem

MI6111

MI.6111 with 16 MSample memory and drivers/SBench 5.x

MI61xx-64M

Option: 64 MSample mem instead of 16 MSample standard mem

MI61xx-128M

Option: 128 MSample mem instead of 16 MSample standard mem

MI6xxx-mr

Option Multiple Replay: Memory segmentation

MI61xx-256M

Option: 256 MSample mem instead of 16 MSample standard mem

MI6xxx-gs

Option Gated Sampling: Gate signal controls replay

MI61xx-512M

Option: 512 MSample mem instead of 16 MSample standard mem

MI6xxx-cs

Synchronisation of 2 - 4 boards, one option per system

MI61xx-up

Additional handling costs for later memory upgrade

MI6xxx-smod

Star Hub: Synchronisation of 2 - 16 boards, one option per system

MI6xxx-1Amp

±10 V Amplifier board with 1 channel

MIxxxx.xio

Extra I/O, internal connector: 16 DI/O, 4 Analog out

MI6xxx-2Amp

±10 V Amplifier board with 2 channels

MIxxxx-xmf

Extra I/O, external connector: 24 DI/O, 4 Analog out, incl. cable

MI6xxx-4Amp

±10 V Amplifier board with 4 channels

Cab-3f-9m-80

Adapter cable: SMB female to BNC male 80 cm

MI61xx-dl

DASYLab driver for MI.61xx series

Cab-3f-9m-200

Adapter cable: SMB female to BNC male 200 cm

MI61xx-hp

VEE driver for MI.61xx series

Cab-3f-9f-80

Adapter cable: SMB female to BNC female 80 cm

MI61xx-lv

LabVIEW driver for MI.61xx series

Cab-3f-9f-200

Adapter cable: SMB female to BNC female 200 cm

MATLAB

MATLAB driver for all MI.xxxx, MC.xxxx and MX.xxxx series.

Summary of Contents for MI.61 Series

Page 1: ...GROSSHANSDORF GERMANY PHONE 49 0 4102 6956 0 FAX 49 0 4102 6956 66 E MAIL info spec de INTERNET http www spectrum instrumentation com MI 61xx fast 8 bit arbitrary waveform generator D A converter boa...

Page 2: ...Window 2000 and Windows XP Windows Vista Windows 7 are trademarks registered trademarks of Microsoft Corporation LabVIEW DASYLab Diadem and LabWindows CVI are trademarks registered trademarks of Natio...

Page 3: ...ation 17 Interrupt Sharing 17 Important Notes on Driver Version 4 00 17 Windows XP 32 64 Bit 18 Installation 18 Version control 18 Driver Update 19 Windows Vista 7 32 64 Bit 20 Installation 20 Version...

Page 4: ...l description 42 Singleshot mode 42 Continuous Mode 42 Posttrigger Mode 42 Programming 42 Partitioning the memory 42 Starting without interrupt classic mode 44 Starting with interrupt driven mode 44 D...

Page 5: ...zation options 66 Synchronization with option cascading 66 Synchronization with option starhub 66 The setup order for the different synchronization options 67 Setup Order for use with standard non FIF...

Page 6: ...um instrumentation com You will also find the current driver package with the latest bug fixes and new features on our site Please read this manual carefully before you install any hardware or softwar...

Page 7: ...s of the MI 61xx series The following overwiew shows the different available models of the MI 61xx series They differ in the number mounted generation modules and the number of available channels You...

Page 8: ...n because there is just space for one piggyback module on the on board expansion slot Extra I O Option XIO With this simple to use enhancement it is possible to control a wide range of external instru...

Page 9: ...y without any ca bles to achieve a better visibility Any board could be the clock mas ter and the same or any other board could be the trigger master All trigger modes that are available on the master...

Page 10: ...The serial number of your Spectrum board Every board has a unique serial number The board revision consisting of the base version and the module version A list of the installed options A complete list...

Page 11: ...0 to 90 Output to trigger out delay 1 channel 10 MS s 10 sampl 10 MS s 42 sampl Offset stepsize 2 mV Output to trigger out delay 2 channels 5 MS s 5 sampl 5 MS s 21 sampl Amplitude stepsize 1 mV Cross...

Page 12: ...ory and drivers SBench 5 x MI61xx 32M Option 32 MSample mem instead of 16 MSample standard mem MI6111 MI 6111 with 16 MSample memory and drivers SBench 5 x MI61xx 64M Option 64 MSample mem instead of...

Page 13: ...uring longer pauses between the single measurements the power down mode should be called to reduce the heat production Sources of noise The boards of the MI xxxx series should be placed far away from...

Page 14: ...insertion fasten the screws of both brackets carefully without overdoing The figure shows an example of a board with two installed modules Installing a board with extra I O Option XMF Before installin...

Page 15: ...to achieve a better visi bility As some of the synchronization cables are not secured against wrong plugging you should take care to have the pin 1 markers on the multiple connectors and the cable on...

Page 16: ...r of synchronized boards in a row with the dedicated boards on the outer sides Mounting the wired boards Before installing the boards you first need to unscrew and remove the dedicated blind brackets...

Page 17: ...nstalled PCI boards with their allocated interrupt lines directly after system start You have to check whether an interrupt line is shared between two boards Some BIOS allow the manual allocation of i...

Page 18: ...e The driver files are located on CD in the directory Driver win32 winxp_vista_7 for Windows Vista 7 for 32 Bit or Driver win64 winxp_vista_7 for Windows Vista 7 for 64 Bit The hardware assistant show...

Page 19: ...boards A new driver version is directly installed from the device manager Therefore please open the properties page of the driver as shown in the section before As next step click on the update driver...

Page 20: ...as shown on the right Find the above mentioned PCI Device right click and select Update Driver Software Do not let Windows Vista 7 automatically search the for the best driv er because it will search...

Page 21: ...nt to check which driver version is installed in the system this can be easily done in the device manager Therefore please start the device manager from the control panel and show the properties of th...

Page 22: ...lled with the driver The Utility can be found in the start menu as DrvConfig To add a new card please follow these steps Increase the board number on top of the screen by pressing the right button Cha...

Page 23: ...c o The driver includes all Spectrum PCI PXI and CompactPCI boards The boards are recognized automatically after driver loading Load the driver with the insmod command The insmod command may generate...

Page 24: ...own in the last step the minor number is the index of the board starting with 0 This step must only be done once for the system where the boards are installed in The device will remain in the file str...

Page 25: ...The optional drivers for third party products like LabVIEW or DASYLab are also based on this API The special functionality of these drivers is not subject of this manual and is described on separate...

Page 26: ...the drivers The library file can be found on the CD in the path Examples vc c_header Please include the library file spclib_bcc lib in your Borland C Builder project All functions described below are...

Page 27: ...o be merged with the standard windows examples described under Visual C Driver functions The driver contains five functions to access the hardware Function SpcInitPCIBoard This function initializes al...

Page 28: ...SpcSetAdr This function is only available under Linux It is intended to program one of the FIFO buffer addresses to the driver Depending on the platform 32 bit or 64 bit the address parameter has a ma...

Page 29: ...uld hold the data The function will return an error value in case of malfunction This function is only available on acquisition or i o boards The function is not available on generator boards Function...

Page 30: ...can be set by the function SpcSetParam This function sets a register to a defined value or executes a command The board must first be initialized The available software registers for the driver are li...

Page 31: ...channel The board must first be initialized The value nr contains the index of the board that you want to access the ch parameter contains the memory channel start and len define the position of data...

Page 32: ...n SpcInitPCIBoard Function SpcSetParam All hardware settings are based on software registers that can be set by the function SpcSetParam This function sets a register to a defined value or executes a...

Page 33: ...enerator or i o boards The function is not available on acquisition boards Function SpcGetData Reads data from the board from a specific memory channel The board must first be initialized The value nr...

Page 34: ...s that contain either a board number Windows or a handle Linux use the common parameter name hDrv Windows users simply have to set the parameter to the according board number as the example below is s...

Page 35: ...initialization of the board and check for errors PCI Register These registers are set by the driver after the PCI initialization The information is found in the on board ROM and can easily be read ou...

Page 36: ...you the maximum possible samplerate the board can run however The information provided here does not consider any restrictions in the maximum speed caused by special channel settings For detailed inf...

Page 37: ...ed with one of the masks below to get information about one certain feature PCIBIT_MULTI 1 Is set if the Option Multiple Recording Multiple Replay is installed PCIBIT_DIGITAL 2 Is set if the Option Di...

Page 38: ...K return if nCount 0 printf No Spectrum board found n return request and print Board type and some information SpcGetParam hDrv SPC_PCITYP lBrdType SpcGetParam hDrv SPC_PCIMEMSIZE lInstMemsize SpcGetP...

Page 39: ...es are used in more than one hardware manual most of the registers and channel settings throughout this handbook are described for the maximum number of possible channels that are available on one car...

Page 40: ...up the offset in combination with different am plitudes The offset settings can be changed at any time even if the board is running and outputting a signal to the connectors The board will not be stop...

Page 41: ...The board will not be stopped for changing the different filters You can choose between the different filters easily by setting the dedicated filter registers The registers and the possible values are...

Page 42: ...arting the output board together with an acquisiton board The data is written to a programmed amount of the on board memory memsize After starting the board the output will im mediately start and cont...

Page 43: ...e amount of memory that can be used either for the memsize and the postcounter values can only be set by certain steps These steps are results of the internal memory organization For this reason these...

Page 44: ...rrupt driven mode does in the main not differ from the classic mode But there has to be done some additional programming to prevent the program from hanging The SPC_STARTANDWAIT command doesn t return...

Page 45: ...of the replay memory That can be very helpful if only parts of the signal should be exchanged However the user must make sure that the complete replay memory is filled with appropriate data The value...

Page 46: ...h memory channels have been used pbyData i ptr8 malloc lMemsize allocate memory for the data pointers with the maximum size lMemsize generate or load data into pbyData 0 1 SpcSetData hDrv 0 0 lMemsize...

Page 47: ...omatically in the background After driver has finsihed transferring the data the application software gets a signal and can generate data or load the next buffer from hard disk After processing the da...

Page 48: ...defined in bytes This length is used for hardware and software buffers as well Both have the same length The maximum length that can be used is depending on the installed on board memory Each FIFO buf...

Page 49: ...nnels 2 x Samples in Buffer 2 x 2 x Samples in Buffer 2 x 2 x Samples in Buffer 2 x 2 x Samples in Buffer 4 Channels 4 x Samples in Buffer 4 x 2 x Samples in Buffer 4 x 2 x Samples in Buffer 4 x 2 x S...

Page 50: ...ality but can handle more FIFO buffers For back ward compatibility the older commands still work but are still limited to 16 buffers Example FIFO generation mode This example shows the main loop of a...

Page 51: ...le 4 of channel 2 The following example shows how to sort the channel data when using 4 channels in FIFO mode Sample format The sample format in FIFO mode does not differ from the one of the standard...

Page 52: ...n internal 40 MHz frequency reference In most cases the user does not need to care on how the desired sample rate is generated by multiplying and dividing internally You simply write the desired sampl...

Page 53: ...examines the reference clock and the sample rate regis ters Example of reference clock Termination of the clock input If the external connector is used as an input either for feeding in an external r...

Page 54: ...as well so a different board setup for external clocking must always include the related clock ranges This table below shows the ranges that are defined by the different range registers mentioned abo...

Page 55: ...he board Available divider values SpcSetParam hDrv SPC_CHENABLE CHANNEL0 CHANNEL1 CHANNEL2 CHANNEL3 activate all 4 channels SpcSetParam hDrv SPC_EXTERNALCLOCK 1 activate external clock SpcSetParam hDr...

Page 56: ...with your Spectrum board Example for setting up the software trigger External TTL trigger Enabling the external trigger input is performed by one of the following external trigger modes The dedicated...

Page 57: ...d for positive TTL trigger Negative TTL trigger This mode is for detecting the falling edges of an external TTL sig nal The board will trigger on the first falling edge that is detected after starting...

Page 58: ...the first rising or falling edge that is detected after starting the board The next trigger event will then be detected if the actual recording replay has fin ished and the board is armed and waiting...

Page 59: ...e able to in FIFO mode without Multiple Replay Usually the FIFO blocks are multiples of the Multiple Replay segments The advantage of Multiple Replay in FIFO mode is that you can stream data online fr...

Page 60: ...Standard x x 8 samples 10 samples 5 MHz Standard x x 24 samples 26 samples 2 5 MHz FIFO x x 5 samples 6 samples 2 5 MHz FIFO x x 14 samples 15 samples 2 5 MHz Standard x x x x 5 samples 6 samples 2 5...

Page 61: ...dvantage of Gated Replay in FIFO mode is that you can stream data online from the host system to the board so you can replay a huge amount of data from the hard disk with a lower average data rate tha...

Page 62: ...selected channels Please refer to this table to see how many samples per channel of alignement one gets Resulting start delays Module 0 Module 1 0 1 0 1 Mode Alignement X Standard FIFO 16 samples X X...

Page 63: ...hat has to be detected for gate start end for gate end External TTL edge trigger Example program The following example shows how to set up the board for Gated Replay in standard mode The setup would b...

Page 64: ...lues so simply have to OR them bitwise Transfer Data The outputs can be written or read by a single 32 bit register If the register is read the actual pin data will be taken Therefore reading the data...

Page 65: ...for the analog output A0 10000 mV in steps of 5 mV SPC_XIO_ANALOGOUT1 47121 r w Defines the output value for the analog output A1 10000 mV in steps of 5 mV SPC_XIO_ANALOGOUT2 47122 r w Defines the out...

Page 66: ...rds are marked with the option cs end while middle boards are marked with the option cs mid When the boards are synchronized by the option cascading there will be a delay of about 500 ps between two a...

Page 67: ...ds trigger detection is armed Take care to prevent boards with a long pretrigger setup time from hangup by adequately checking the board s status Long setup times are needed if either you use a huge p...

Page 68: ...ve to tell the driver additionally which of the boards are working as trigger slaves Each of the synchronized boards must be set up either as a trigger master or as a trigger slave to get the synchron...

Page 69: ...s that are defined as trigger slaves first For details on how to start the board in the different modes in standard mode non FIFO please refer to the according chapter earlier in this manual If using...

Page 70: ...or polling for three synchronzed boards 12 Read data from the on board memory acquisition boards only If one or more of the synchronized boards are used for recording data transient recorder boards or...

Page 71: ...n one board to clock master Example board number 0 is clock master 7 Define the remaining boards as clock slaves It is necessary to set all the remaining boards to clock slaves to obtain correct inter...

Page 72: ...settings in FIFO mode and waits for the first interrupt Register Value Direction Description SPC_COMMAND 0 r w Command register of the board SPC_FIFOSTART 12 Starts the board with the current register...

Page 73: ...in the board s manual to get informed about the relation beween the board model and the number of actually activated channels per mod ule for the different channel setups As mentioned above the board...

Page 74: ...here slave clock is divided Example calculation with synchronous speed where master clock is divided Additions for equal boards with different sample rates In addition to the possibility of synchroniz...

Page 75: ...FIFO mode When the FIFO mode is used a delay is occuring between the data of the different boards This delay is depending on the type of board the selected clock divider and the activated channel You...

Page 76: ...hannel sequence is not allowed ERR_READABORT 104h 260 Data read is not allowed after aborting the data acquisition ERR_NOACCESS 105h 261 Access to this register denied No access for user allowed ERR_P...

Page 77: ...The 40 lead multipin cable is used for the additional digital inputs on analog acquisition boards only or additional digital outputs on analog generation boards only as well as for the digital I O or...

Page 78: ...nnector pin IDC footprint pin 1 A1 A21 A41 A61 B1 B21 B41 or B61 A2 A22 A42 A62 B2 B22 B42 or B62 2 3 A3 A23 A43 A63 B3 B23 B43 or B63 A4 A24 A44 A64 B4 B24 B44 or B64 4 5 A5 A25 A45 A65 B5 B25 B45 or...

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