Sony SCD-XA9000ES - Es Super Audio Cd Player, Service Manual

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85
SCD-XA9000ES
•
MAIN BOARD IC901 CXP973064-241R (CPU)
Pin No. Pin Name I/O Description
1 MUTE_ LOAD O Muting on/off control signal output to the loading motor drive “L”: muting on
2 RST_DY O
Reset signal output to the DSD digital signal processor “L”: reset
3 DOCTRL O
Digital out on/off control signal output to the digital signal processor
“L”: digital out off, “H”: digital out on
4 MUTE_2D O Muting on/off control signal output to the focus/tracking coil drive “L”: muting on
5
MODE_SACD
O
SACD/CD mode selection signal output terminal “L”: CD mode, “H”: SACD mode
6
SP_ON
O
Muting on/off control signal output to the spindle motor drive “L”: muting on
7 FCS_JMP1 O Focus jump 1 signal output terminal
8 FCS_JMP2 O
Focus jump 2 signal output terminal
9 SENS_CD I
Internal status (SENSE) signal input from the digital signal processor
10 XDIS_IO O Reset signal output to the I/O expander “L”: reset
11 XCS_IO O
Chip select signal output to the I/O expander
12 XCS_DVD O
Chip select signal output to the SACD decoder
13 VSS — Ground terminal (digital system)
14 to 21 D0 to D7 I/O
Two-way data bus with the SACD decoder and I/O expander
22 INT0_DVD I
Interrupt signal input from the SACD decoder
23 INT1_DVD I Interrupt signal input from the SACD decoder
24 T_SENS I
Input terminal of disc tray status detection signal from table sensor Not used
25 MIRR_RF I
Mirror signal input from the digital signal processor
26 SCOR_CD I Subcode sync (S0+S1) detection signal input from the digital signal processor
27 RDY_DSD I
Ready signal input from the DSD decoder “L”: ready
28
MUTE_DSD
O
Soft muting on/off control signal output to the DSD decoder “H”: muting on
29 COUT_CD I Numbers of track counted signal input from the digital signal processor
30 IN_SW I
Loading in switch input terminal “L”: loading in
31 OUT_SW I
Loading out switch input terminal “L”: loading out
32 — I Not used
33 SQSO_CD I
Subcode Q data input from the digital signal processor
34 DATA_CD O
Serial data output to the digital signal processor
35 CLOK_CD O
Serial data transfer clock signal output to the digital signal processor
36 XLAT_CD O
Serial data latch pulse signal output to the digital signal processor
37 SQCK_CD O
Subcode Q data reading clock signal output to the digital signal processor
38 XRST I
System reset signal input terminal “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
39 VSS —
Ground terminal (digital system)
40 XTAL I
System clock input terminal (20 MHz)
41 EXTAL O
System clock output terminal (20 MHz)
42 VDD —
Power supply terminal (+3.3V) (digital system)
43 SPDA O
Spindle motor control signal output terminal
44 APDO O
Output terminal for offset adjustment of APEO (
<z/.
pin of SACD decoder)
45 LOAD_IN O Loading motor drive signal (loading in direction) output terminal
46
LOAD_OUT
O
Loading motor drive signal (loading out direction) output terminal
47 XLAT_DSD O
Serial data latch pulse signal output to the DSD decoder
48 SIN_DSD I Serial data input from the DSD decoder and DSD digital signal processor
49 SOUT_DSD O
Serial data output to the DSD decoder, DSD digital signal processor and D/A converter
50 SCK_DSD O
Serial data transfer clock signal output to the DSD decoder, DSD digital signal processor and D/A
converter