Sony SCD-XA9000ES - Es Super Audio Cd Player, Service Manual

Page: 86 / 124

86
SCD-XA9000ES
Pin No. Pin Name I/O Description
51 BUSY_DP I Busy signal input from the display controller
52 SIN_DP I
Serial data input from the display controller
53 SOUT_DP O
Serial data output to the display controller
54 SCLK_DP O Serial data transfer clock signal output to the display controller
55 VSS —
Ground terminal (digital system)
56 REQ_DP O
Request signal output to the display controller
57 XCS_DY O Chip select signal output to the DSD digital signal processor
58 GFS_DVD I
Guard frame sync signal input from the SACD decoder
59 SP_ERR I
Spindle motor backward voltage input terminal
60
AMUT_MCH
O
Surround, center and sub woofer audio muting on/off control signal output terminal
“L”: muting on
61 MLS_RST O
Reset signal output to the i-link system controller “L”: reset
62 LAT_DF_B O
Serial data latch pulse signal output to the D/A converter
63 DOON O Digital out on/off control signal output terminal “L”: digital out off, “H”: digital out on
64 JITTER I
Jitter signal input terminal
65 TE I
Tracking error signal input from the SACD/CD RF amplifier
66 PI I Pull in signal input from the SACD/CD RF amplifier
67 FE I
Focus error signal input from the SACD/CD RF amplifier
68 AVSS —
Ground terminal (for A/D converter)
69 AVREF I Reference voltage (+3.3V) input terminal (for A/D converter)
70 AVDD —
Power supply terminal (+3.3V) (for A/D converter)
71 GFS_CD I
Guard frame sync signal input from the digital signal processor
72 SCLK_CD O SENSE serial data reading clock signal output to the digital signal processor
73
MUTE_CD
O
Muting on/off control signal output to the digital signal processor “H”: muting on
74 FOK_CD I
Focus OK signal input from the digital signal processor
75 LOCK_CD I GFS is sampled by 460 Hz “H” input when GFS is “H”
76 MULTI O
Multi/2ch selection signal output terminal “L”: 2ch, “H”: multi
77 CLK_RF O
Serial data transfer clock signal output to the SACD/CD RF amplifier
78 EEPSIO I/O Two-way data bus with the EEPROM and i-link system controller
79 EEPSCL I/O
Clock signal bus with the EEPROM and i-link system controller
80 RXD I
Not used
81 TXD O Not used
82 CLK_SW I
OSC on/off control signal output terminal “L”: OSC off, “H”: OSC on
83 DATA_RF I/O
Two-way data bus with the SACD/CD RF amplifier
84 XWR O Write strobe signal output to the SACD decoder and I/O expander
85 XRD O
Read strobe signal output to the SACD decoder and I/O expander
86 NC_(PWE/VPP) —
Not used
87 VDD — Power supply terminal (+3.3V) (digital system)
88 VSS —
Ground terminal (digital system)
89 A0 O
Address signal output to the SACD decoder and I/O expander
90 to 96 A1 to A7 O
Address signal output to the SACD decoder
97 INIT_DF O
Reset signal output to the D/A converter “L”: reset
98 LAT_DF_A O
Serial data latch pulse signal output to the D/A converter
99
SWGUP
O
Sub woofer gain up/normal control signal output terminal “L”: normal, “H”: gain up
100 LD_ON O
Laser diode on/off control signal output to the SACD/CD RF amplifier
“L”: laser diode off, “H”: laser diode on