SCD-XA9000ES
41
41
FL807
C856
R851
R835
R836
R837
R838
R840
R841
R842
R826
R850
R821
R822
R848
R849
C861
C857
C855
R1014
R1019
C860
C858
FB720
R866
C817
C818
C808
R829
C810
R831
R827
C807
R828
R839
R800
C838
C839
IC813
IC814
C813
R847
IC812
C811
C819
C812
C843
C854
R1015
FL811
C941
C865
C867
C866
R852
R834
R833
R832
R809
C870
C815
C809
C871
C800
FL813
FB717
C848
C841
FL812
C795
C797
C796
FB719
C803
C802
D904
FL810
FB716
C837
C849
C804
R830
R882
R883
R884
R885
R886
R887
R888
R889
C842
IC808
R870
FB718
C840
IC702
TP808
0.01
0
0
0
0
0
0
0
0
22
22
22
22
22
22
0.01
0.01
0.01
0
0
0.01
100
6.3V
220
0.01
0.01
100p
100
0.01
33k
100
0.01
4.7k
4.7k
4.7k
0.01
0.01
SN74LV245APWR
SN74AHCT1G08DCKR
0.01
22
SN74LV245APWR
0.01
0.01
0.01
0.01
0.01
22
1
0.01
0.01
0.01
0
0
0
0
100
0.022
0.01
10
10V
0.01
0.01
0.01
10
10V
100
6.3V
220
4V
1
0.01
10
10V
1SS367
0.01
0.01
0.01
4.7k
10k
10k
10k
10k
10k
10k
10k
10k
0.01
MSM56V16160F-10T
10k
10
10V
TA48M025F
(DGND)
D1
D2
D3
D4
D5
D6
D7
D8
D9
E1
E2
E3
E4
E5
F1
F2
DSD_BUS
DGND
AGND
D3V
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
XSHD
SDCK
XSHD
XSAK
SDEF
XDCK
AV0
AV1
AV2
AV3
AV4
AV5
AV6
AV7
SDEF
XSAK
XSAK
SDEF
XSHD
SDCK
AV0
AV1
AV2
AV3
AV4
AV5
AV6
AV7
XSRQ
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SCAS
SRAS
SWE
DCLK
DCKE
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
S
A
4
S
A
5
S
A
6
S
A
7
S
A
8
S
A
9
D
C
L
K
D
C
K
E
128FS
64FS
D
Q
0
D
Q
1
D
Q
2
D
Q
3
D
Q
4
D
Q
5
D
Q
6
D
Q
7
S
W
E
S
C
A
S
S
R
A
S
S
A
1
1
S
A
1
0
S
A
0
S
A
1
S
A
2
S
A
3
P
C
K
O
R
F_
A
C
W
A
V
R
B
IOUT0
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
DSAL
DSAR
DSAC
DSASW
DSASL
DSASR
M
U
T
E
_
D
S
D
X
R
S
T
_
D
S
D
R
D
Y
_
D
S
D
S
IN
_
D
S
D
S
O
U
T
_
D
S
D
S
C
K
_D
S
D
X
L
A
T
_
D
S
D
IFULL
ANCIO
SD5V
IB
C
K
IO
U
T
E
IF
R
M
IE
M
P
T
Y
D
Q
6
D
Q
7
(4/7)
LEVEL SHIFT
LEVEL SHIFT
LEVEL SHIFT
16Mbit D-RAM
+2.5V REGULATOR
5-16. SCHEMATIC DIAGRAM – MAIN Board (4/7) –
•
See page 65 for Waveforms.