HT-NT3
66
Pin No.
Pin Name
I/O
Description
AG14
RDQ0
I/O
Two-way data bus with the SD-RAM
AG16
RDQS0
O
Data strobe signal (positive) output to the SD-RAM
AG17
RCLK0
O
Clock signal (positive) output to the SD-RAM
AG18
RDQS1_
O
Data strobe signal (negative) output to the SD-RAM
AG19,
AG20
RDQ7, RDQ4
I/O
Two-way data bus with the SD-RAM
AG21 to
AG23
NFD7, NFD4, NFD2
I/O
Two-way data bus with the NAND
fl
ash
AG25
GPIO8
O
VBUS on/off control signal output terminal for WLAN/BT COMBO card "H": VBUS on
AG26
VCLK
O
Serial data transfer clock signal output to the system controller
AG27
VDATA
I
Serial data input from the system controller
AG28
LCDRD
O
Serial data output to the system controller
AH1 to AH3
RDQ18, RDQ19,
RDQ24
I/O
Two-way data bus with the SD-RAM
AH4
RDQM3
O
Data mask signal output to the SD-RAM
AH5
RDQS2_
O
Data strobe signal (negative) output to the SD-RAM
AH6
RCLK1_
O
Clock signal (negative) output to the SD-RAM
AH7
RDQS3
O
Data strobe signal (positive) output to the SD-RAM
AH8
RDQ23
I/O
Two-way data bus with the SD-RAM
AH10,
AH11
RA0, RA7
O
Address signal output to the SD-RAM
AH13
RCKE
O
Clock enable signal output to the SD-RAM
AH14
RDQ2
I/O
Two-way data bus with the SD-RAM
AH16
RDQS0_
O
Data strobe signal (negative) output to the SD-RAM
AH17
RCLK0_
O
Clock signal (negative) output to the SD-RAM
AH18
RDQS1
O
Data strobe signal (positive) output to the SD-RAM
AH19
RDQM0
O
Data mask signal output to the SD-RAM
AH20
RDQ6
I/O
Two-way data bus with the SD-RAM
AH22,
AH23
NFD5, NFD3
I/O
Two-way data bus with the NAND
fl
ash
AH25
OPWRSB
O
Power control signal output to the system controller
AH26
UATXD
-
Not used
AH27
VSTB
-
Not used
AH28
IR
-
Not used
Summary of Contents for HT-NT3
Page 95: ...MEMO HT NT3 95 ...
