HT-CT380/CT381
56
Pin No.
Pin Name
I/O
Description
59
DSDA2
I/O
Two-way I2C serial data bus with the HDMI IN 1 connector
60
DSCL2
I
I2C serial data transfer clock signal input from the HDMI IN 1 connector
61
CBUS_HPD2
O
Hot plug detection control signal output to the HDMI IN 1 connector
62
R2PWR5V
I
Power supply voltage (+5V) input from the HDMI IN 1 connector
63
DSDA3
I/O
Two-way I2C serial data bus with the HDMI IN 2 connector
64
DSCL3
I
I2C serial data transfer clock signal input from the HDMI IN 2 connector
65
CBUS_HPD3
O
Hot plug detection control signal output to the HDMI IN 2 connector
66
R3PWR5V
I
Power supply voltage (+5V) input from the HDMI IN 2 connector
67
TXDSDA
I/O
Two-way I2C serial data bus with the ARC HDMI OUT connector
68
TXDSCL
O
I2C serial data transfer clock signal output to the ARC HDMI OUT connector
69
TX_HPD
I
Hot plug detection signal input from the ARC HDMI OUT connector
70
MHL_CD0_GPIO0
-
Not used
71
APLL10
-
Power supply terminal (+1V)
72
XTALVCC33
-
Power supply terminal (+3.3V)
73
XTALOUT
O
System clock output terminal (27 MHz)
74
XTALIN
I
System clock input terminal (27 MHz)
75
XTALGND
-
Ground terminal
76
TPVDD10
-
Power supply terminal (+1V)
77
TXC–
O
TMDS clock (negative) signal output to the ARC HDMI OUT connector
78
TXC+
O
TMDS clock (positive) signal output to the ARC HDMI OUT connector
79
TX0–
O
TMDS data (negative) output to the ARC HDMI OUT connector
80
TX0+
O
TMDS data (positive) output to the ARC HDMI OUT connector
81
TDVDD10
-
Power supply terminal (+1V)
82
TX1–
O
TMDS data (negative) output to the ARC HDMI OUT connector
83
TX1+
O
TMDS data (positive) output to the ARC HDMI OUT connector
84
TX2–
O
TMDS data (negative) output to the ARC HDMI OUT connector
85
TX2+
O
TMDS data (positive) output to the ARC HDMI OUT connector
86
CVDD10
-
Power supply terminal (+1V)
87
ARCRX_TX
I
Digital audio signal input terminal Not used
88
WS0_OUT_DR0_
GPIO7
O
L/R sampling clock signal output to the digital audio interface receiver
89
SCK0_DCK
O
Bit clock signal output to the digital audio interface receiver
90
SD0_0_DL0
O
Digital audio signal output to the digital audio interface receiver
91
MCLK
O
Master clock signal output to the digital audio interface receiver
92
SD0_1_DR1_GPIO1
O
Digital audio signal output to the digital audio interface receiver
93
SD0_2_DL1_GPIO2
O
Digital audio signal output to the digital audio interface receiver
94
SD0_3_DR2_GPIO3
O
Digital audio signal output to the digital audio interface receiver
95
MUTEOUT_GPIO4
O
HDMI muting on/off control signal output terminal “H”: muting on
96
SPDIFOUT_DL2
O
S/PDIF audio signal output to the digital audio interface receiver
97
IOVCC33
-
Power supply terminal (+3.3V)
98
SDO_GPIO10
-
Not used
99
SDI_GPIO11
-
Not used
100
SS_GPIO8
-
Not used
