HT-CT380/CT381
54
Pin No.
Pin Name
I/O
Description
61
LRCLK_OUT
O
L/R sampling clock signal output to the stream processor and RF modulator
62
SBL/SBR_IN
I
Audio signal (for surround back L-ch/R-ch) input from the digital audio interface receiver
63
L/R_IN
I
Audio signal (for front L-ch/R-ch) input from the digital audio interface receiver
64
VDD_INT
-
Power supply terminal (+1.1V) (for core)
65
DIR_IN
I
Audio signal input from the digital audio interface receiver
66, 67
VDD_INT
-
Power supply terminal (+1.1V) (for core)
68
GND
-
Ground terminal
69
THD_M
O
Thermal detection signal output terminal Not used
70
THD_P
I
Thermal detection signal input terminal Not used
71
VDD_THD
-
Power supply terminal (+3.3V)
72 to 76
VDD_INT
-
Power supply terminal (+1.1V) (for core)
77
FLAG0
O
Interrupt request signal output to the system controller
78, 79
VDD_INT
-
Power supply terminal (+1.1V) (for core)
80
FLAG1
I
Error detection signal input terminal “L”: error
81
FLAG2
I
Audio setting signal input terminal “L”: LPCM audio, “H”: HBR audio
82
FLAG3
-
Not used
83
MLBCLK
-
Not used
84
MLBDAT
-
Not used
85
MLBDO
-
Not used
86
VDD_EXT
-
Power supply terminal (+3.3V) (for I/O)
87
MLBSIG
-
Not used
88
VDD_INT
-
Power supply terminal (+1.1V) (for core)
89
MLBSO
-
Not used
90
TRST
I
Test reset signal input terminal (for JTAG) Not used
91
EMU
O
Emulation status signal output terminal Not used
92
TDO
O
Test data output terminal (for JTAG) Not used
93
VDD_EXT
-
Power supply terminal (+3.3V) (for I/O)
94
VDD_INT
-
Power supply terminal (+1.1V) (for core)
95
TDI
I
Test data input terminal (for JTAG) Not used
96
TCK
I
Test clock signal input terminal (for JTAG) Not used
97
VDD_INT
-
Power supply terminal (+1.1V) (for core)
98
RESET
I
Reset signal input from the system controller “L”: reset
99
TMS
I
Test mode selection signal input terminal (for JTAG) Not used
100
VDD_INT
-
Power supply terminal (+1.1V) (for core)
