66
HCD-L7HD
Pin No.
58
59
60-67
68
69-73
74
75
76
77
78
79,80
81
82
83
84
85,86
87
88
89,90
91
92
93
94-96
97
98
99
100
I/O
—
—
—
O
—
—
—
I
I
I
—
I
I
I
I
—
I
I
I
I
—
I
—
O
I
O
O
Pin Name
BVDD
BVSS
—
CHECK
—
AVDD
AVSS
AVREF
OPTSNS1
OPTSNS2
—
SEL0
SEL1
SEL2
SEL3
—
MECHA—JIG
ADJ
IICHELP
SCOR
—
AC—CUT
—
—
—
—
DACLAT
Description
+5 V power terminal
Ground terminal
Not used
Check terminal
Not used
+5 V power terminal
Analog ground terminal
Analog reference voltage
D sensor input
L sensor input
Not used
Destination select input (Overseas: H, Japan: L)
Model select input (SL7: H, SL1: L) Fixing H
Model select input (not used) Fixing L
BD JIG select input (Normal: H, BD only: L) Fixing H
Not used
MECHA JIG (fixing L)
Adjustment mode input (fixing H)
1
2
C bus help input
CXD3068 SUBQ SYNC input
Not used
AC off input
Not used
Flash ROM data output
Flash ROM data input
Flash ROM clock output
DAC latch output
Summary of Contents for HCD-L7HD
Page 39: ...39 39 HCD L7HD 6 7 Schematic Diagram MOTOR Section ...
Page 42: ...42 42 HCD L7HD 6 10 Schematic Diagram HDD1 Section 1 2 See page 62 for Wavefoms ...
Page 46: ...46 46 HCD L7HD 6 14 Schematic Diagram HDD2 Section 2 2 FOR MEMORY STICK NOT USED ...
Page 49: ...49 49 HCD L7HD 6 17 Schematic Diagram MAIN Section 1 2 See page 62 for Wavefoms ...
Page 55: ...55 55 HCD L7HD 6 23 Schematic Diagram AMP Section See page 62 for Wavefoms ...
Page 57: ...57 57 HCD L7HD 6 25 Schematic Diagram DISPLAY Section See page 62 for Wavefoms ...
Page 59: ...59 59 HCD L7HD 6 27 Schematic Diagram CONTROL Section See page 62 for IC Block Diagrams ...
Page 61: ...61 61 HCD L7HD 6 29 Schematic Diagram POWER Section ...
Page 95: ...95 HCD L7HD MEMO ...
