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69
HCD-L7HD
Pin No.
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114,115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130,131
132
133
I/O
O
—
O
—
O
—
O
O
O
O
O
I/O
I/O
O
I/O
—
O
—
O
O
O
O
O
O
O
O
O
O
O
—
O
—
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I/O
I
I/O
—
I/O
Pin Name
A22
Vcc
A23
VssQ
A24
VccQ
A25
PTK4
RD
WE0
WE1
ICIORD
ICIOWR
RD/WR
PTE[7]
VssQ
CS0
VccQ
PTK[0]
CS3
CS4
CS5
CE1B
PTE4(PCMCIA)
CE2B
CKE
PTJ0
RAS2L
PTJ2
VssQ
PTJ3
VccQ
PTJ4
PTJ5
DACK0,1
CAS2L
CAS2H
PTE2
PTE1
TDO
BACK
BREQ
WAIT
RESETM
PTH5
IOIS16
ASEMD0
ASEBRKAK
PTG4
AUDATA3,2
Vss
AUDATA1
Description
Address bus
Power supply terminal (1.9/1.8V)
Address bus
Ground terminal
Address bus
Power supply terminal (3.3V)
Address bus
IDE reset output
Read signal output
Lower data write signal output (SDRAM)
Upper data write signal output (SDRAM)
PCMCIA I/O read (not used)
PCMCIA I/O write (not used)
Read/Write enable signal output
AUD synchro/input/output port E
Ground terminal
Chip select signal output (FLASH ROM)
Power supply terminal (3.3V)
Chip select signal output (IDE)
Chip select signal output (SDRAM)
Chip select signal output (CDX1859)
Chip select signal output (not used)
CE1 (not used)
Card enable for area 5PCMCIA (not used)
Card enable for area 6PCMCIA (not used)
Clock enable signal output (SDRAM)
RAS signal output (SDRAM)
Not used
CAS signal output (SDRAM)
Ground terminal
CAS signal output (SDRAM) (Not used)
Power supply terminal (3.3V)
CAS signal output for D23-D16 (DRAM) (Not used)
CAS signal output for D31-D24 (DRAM) (Not used)
DMA acknowledge 0,1
CAS signal output for D7-D0 (area 2 DRAM)
CAS signal output for D15-D8 (area 2 DRAM)
Not used
RAS signal output (area 2 DRAM)
Data output (for test)
Bus acknowledge (not used)
Bus request (fixing H)
Hardware wait request (fixing H)
Manual reset request input
Analog trigger
16 bits IO (not used)
ASE mode signal input
ASE break acknowledge
Input port G (not used)
AUD data (not used)
Ground terminal
AUD data (not used)
Summary of Contents for HCD-L7HD
Page 39: ...39 39 HCD L7HD 6 7 Schematic Diagram MOTOR Section ...
Page 42: ...42 42 HCD L7HD 6 10 Schematic Diagram HDD1 Section 1 2 See page 62 for Wavefoms ...
Page 46: ...46 46 HCD L7HD 6 14 Schematic Diagram HDD2 Section 2 2 FOR MEMORY STICK NOT USED ...
Page 49: ...49 49 HCD L7HD 6 17 Schematic Diagram MAIN Section 1 2 See page 62 for Wavefoms ...
Page 55: ...55 55 HCD L7HD 6 23 Schematic Diagram AMP Section See page 62 for Wavefoms ...
Page 57: ...57 57 HCD L7HD 6 25 Schematic Diagram DISPLAY Section See page 62 for Wavefoms ...
Page 59: ...59 59 HCD L7HD 6 27 Schematic Diagram CONTROL Section See page 62 for IC Block Diagrams ...
Page 61: ...61 61 HCD L7HD 6 29 Schematic Diagram POWER Section ...
Page 95: ...95 HCD L7HD MEMO ...