7-10
CLK
XWAT
A0
A1
A2
A3
A4
A5
A6
VSS
D0
D1
D2
D3
D4
D5
D6
D7
NC
VDD
INT
XCS
XWR
XRD
I
I
I
I
I
I
I
I
I
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
O
I
I
I
I/O
Function
Pin No.
Pin Name
Clock output (Not used)
Access wait signal input from sub CPU buffer memory
Address bus input for built-in register
Ground
Data bus input/output with sub CPU
Not used
+5V power supply
Interrupt request signal output to CPU
Chip select signal input
Built-in register writing strobe signal input from CPU
Built-in register out strobe signal input from CPU
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
Summary of Contents for CDL1100
Page 8: ...6 7 Power Supply Power Cord SONY Test Disc YEDS 18 CDL1100 CDM 47 Controller Function check ...
Page 44: ...CDL1100 CD ROM DRIVE CDM 47 2 2 SECTION 7 23 7 24 ...
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