K850
1203-2528 rev. 1
APPENDIX
Components N1210 - N1400
A
P
P
E
NDIX
Pins / Signal cross-reference:
Pin Name
Signal Name
Description
Pin
Name
Signal
Name
E1
WRX_IA
Baseband I output of the Receiver
H8
GND
F1
WRX_IB
Baseband Î output of the Receiver
H7
GND
G1
WRX_QA
Baseband Q output of the Receiver
H6
GND
H1
WRX_QB
Baseband Q output of the Receiver
H5
GND
B1
WTXPOWERSENSE Baseband Output of the Detector
B5
GND
H10
BIAS_CTRL
PA Bias Control Line Input
J6
GND
D
N
G
4
A
t
u
p
n
I
k
c
o
l
C
z
H
M
6
2
K
L
C
B
W
1
D
A8
WB850
WCDMA Band V Antenna Port
D9
GND
A7
WB1900
WCDMA Band II Antenna Port
E9
GND
A9
WB2100
WCDMA Band I Antenna Port
C9
GND
C2
WTX_IA
Baseband I input of the Transmitter
B9
GND
C1
WTX_IB
Baseband Î input of the Transmitter
J8
GND
J5
WTX_QA
Baseband Q input of the Transmitter
B3
GND
J4
WTX_QB
Baseband Q input of the Transmitter
B4
GND
D
N
G
9
J
t
u
p
n
I
e
n
il
e
l
b
a
n
E
A
P
N
E
_
X
T
3
H
J3
TX_VGA
Tx VGA control Line Input
B6
GND
H2
WRFIC_ON
Transceiver Enable Input
J1
GND
D
N
G
7
B
t
u
p
n
I
e
l
b
a
n
E
r
o
t
c
e
t
e
D
N
E
_
E
S
N
E
S
A
P
2
B
G2
RADCLK
Transciever Clock Input
B8
GND
D
N
G
9
F
t
u
p
n
I
a
t
a
D
r
e
v
e
i
c
s
n
a
r
T
T
A
D
D
A
R
2
F
H4
RADSTR2
Transciever Strobe Input
A3
GND
D
N
G
2
A
t
u
p
t
u
O
t
c
e
t
e
D
k
c
o
L
D
L
2
E
D
N
G
1
A
t
u
p
n
I
y
l
p
p
u
S
tl
o
V
8
.
1
8
V
1
_
D
A
R
G
I
D
V
2
J
D
N
G
6
A
t
u
p
n
I
y
l
p
p
u
S
tl
o
V
5
7
.
2
5
7
V
2
_
A
D
A
R
V
2
D
D
N
G
5
A
t
u
p
n
I
y
l
p
p
u
S
y
r
e
tt
a
B
1
T
A
B
V
0
1
F
D
N
G
0
1
A
t
u
p
n
I
y
l
p
p
u
S
y
r
e
tt
a
B
2
T
A
B
V
0
1
G
G9
VCC_PA1
DC/DC Voltage Supply Input
B10
GND
H9
VCC_PA2
DC/DC Voltage Supply Input
C10
GND
D10
GND
E10
GND
J10
GND
J7
GND
SLUG
GND
BLOCK DIAGRAM AND ELECTRICAL SCHEMATIC
F
I
L
T
E
R
RECEIVER
TRANSMITTER
RF PLL
Fractional N
DEMOD
MOD
BASEBAND
CORE EBC
CONTROL
AND
REGISTER
AUTOCALIBRATION
PLL
AMBA
PERIOH .
BUS
TIMER
UART / SPI
INTERRUPT
PCM
RAM
ARM7TDMI
CPU Wrapper
WLAN
I2C
ROM
JTAG
LNA
VGA
I
ADC
Q
ADC
DSP
FILTER
DEMOD
MPX
AUDIO
DAC
DAC
AGC
0 / 90
LOW-IF
GPIO
TUNE
AFC
RDS
RSSI
CO
NT
RO
L
IN
TE
R
FA
C
E
BT_RFP
BT_RFN
BT _REF_CLK_IN
FM_FMIP
FM_RCLK
]
0
:
4
[
O
I
V
_
T
B
]
0
:
5
[
V
H
_
T
B
D
V
_
M
F
A
V
_
M
F
BT_GPIO
[5:0]
BT_LP_CLK
BT_HOST_WAKEUP/
BT_SPI_INT
BT _WAKEUP
BT _RESETN
BT_UART/
BT _SPI [3:0]
BT_PCM
[3:0]
BT_CONFIG
[2:0]
BT_CLK_REQ_IN
[1:0]
BT_CLK_REQ_OUT
[1:0]
FM_LOUT
FM_ROUT
FM_GPIO
[2:0]
FM_VIO
FM_RSTB
FM_SDIO
FM_SCLK
FM_SENB
NC
[5:0]
BT_REG_
CTRL
FM_GND
[7:0]
BT _RSRV
[4:0]
FM_RFGND
BT_TEST
[1:0]
BT_VDD_CLD
BT _AF_PRG
BT_VSS
[20:0]
Headphone
Cable
Pinout Bottom View
A
B
C
D
E
F
G
H
J
K
L
M
N
FM_GND
FM_VA
FM_GPIO3
FM_GPIO2
FM_GPIO1
FM_VD
FM_GND
FM_LOUT
FM_GND
FM_GND
BT_RSRV_CL
FM_FMIP
BT_RSRV_N
BT_RSRV_CL
FM_GND
FM_ROUT
FM_GND
BT_RSRV_DSM
FM_GND
FM_RFGND
FM_RSTB
BT_VSSANA
BT_HVA
NC
FM_GND
FM_VIO
BT_VSSANA
FM_RCLK
FM_SDIO
FM_SENB
BT_HVA
BT_VSSANA
BT_HVA
BT_VDD_CLD
BT_HVA
BT_CLK_
REQ_IN1
BT_HOST_WAKEUP
BT_SPI_INT
FM_SCLK
BT_VSSANA
BT_VSSANA
BT_VSSANA
BT_REF_CLK_IN
BT_VSSANA
NC
NC
BT_CLK_REQ_IN2
BT_TEST2
BT_VSSANA
BT_VSSANA
BT_AF_PRG
BT_VSSANA
BT_UART_TXD
BT_SPI_DO
BT_VIO_E
BT_GPIO_0
BT_TEST1
BT_VSSANA
BT_VSSANA
BT_VSSDIG
BT_VSSRF
BT_VSSDIG
BT_VSSDIG
BT_UART_RXD
BT_SPI_DI
BT_VSSRF
BT_GPIO_16 BT_REG_CTRL
BT_UART_RTS
BT_SPI_CSN
BT_RFN
BT_CLK_
REQ_OUT1
BT_CLK_
REQ_OUT2
BT_VIO_B
BT_VSSRF
BT_GPIO_11
BT_GPIO_10
BT_PCM_A
BT_UART_CTS
BT_SPI_CLK
BT_RFP
BT_RESETN
BT_VSSDIG
BT_LP_CLK
BT_HVA
BT_GPIO_8
NC
NC
NC
BT_VSSRF
BT_CONFIG_1
BT_VSSDIG
BT_WAKEUP
BT_GPIO_9
BT_PCM_CLK
BT_PCM_B
BT_VIO_A
BT_CONFIG_2
BT_RSRV_RF
BT_RSRV_D
BT_PCM_SYNC
BT_VIO_D
BT_CONFIG_3
BT_HVD
BT_VIO_C
1
2
3
4
6
7
8
9
5
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SEMC Troubleshooting Manual
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