SN8P26L38
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 89
Version 1.5
8.3
TIMER 1 (T1)
8.3.1 OVERVIEW
The T1 is an 16-bit binary up timer. If T1 timer occurs an overflow (from FFFFH to 0000H), it will continue counting and
issue a time-out signal to trigger T1 interrupt to request interrupt service.
The main purposes of the T1 timer is as following.
16-bit programmable up counting timer:
Generates interrupts at specific time intervals based on the selected
clock frequency.
Fcpu
T1 Rate
(Fcpu/2~Fcpu/256)
T1ENB
CPUM0,1
T1C
16-Bit Binary Up Counting Counter
T1 Time Out
T1CH
T1CL
Read/Write T1CH Register
8.3.2 T1M MODE REGISTER
0A0H
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
T1M
T1ENB
T1RATE2
T1RATE1
T1RATE0
-
-
-
-
Read/Write
R/W
R/W
R/W
R/W
-
-
-
-
After reset
0
0
0
0
-
-
-
-
Bit 7
T1ENB:
T1 counter control bit.
0 = Disable T1 timer.
1 = Enable T1 timer.
Bit [6:4]
T1RATE[2:0]:
T1 timer internal clock select bits.
000 = fcpu/256.
001 = fcpu/128.
…
110 = fcpu/4.
111 = fcpu/2.
