SN8P26L38
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 23
Version 1.5
2.2
DATA MEMORY (RAM)
880 X 8-bit RAM
BANK
Address
RAM Location
Bank 0
000H
General purpose area
RAM Bank 0
...
...
07FH
080H
System Register
80h~FFh of Bank 0 store
system registers (128
bytes).
...
0FFH
End of Bank 0
Bank 1
100H
General purpose area
RAM Bank 1
…
…
1FFH
End of Bank 1
Bank 2
200H
General purpose area
RAM Bank 2
…
…
2FFH
End of Bank 2
Bank 3
300H
General purpose area
RAM Bank 3
…
…
3EFH
End of Bank 3
The 880-byte general purpose RAM is separated into Bank 0~Bank 3. Accessing the two banks
’ RAM is controlled by
“RBANK” register. When RBANK = 0, the program controls Bank 0 RAM directly. When RBANK = 1, the program
controls Bank 1 RAM directly. Under one bank condition and need to access the other bank RAM, setup the RBANK
register is necessary. Sonix provides
“Bank 0” type instructions (e.g. b0mov, b0add, b0bts1, b0bset…) to control Bank
0 RAM in non-zero RAM bank condition directly.
Example: Access Bank 0 RAM in Bank 1 condition. Move Bank 0 RAM (WK00) value to Bank 1 RAM
(WK01).
; Bank 1 (RBANK = 1)
B0MOV
A, WK00
; Use Bank 0 type instruction to access Bank 0 RAM.
MOV
WK01,A
Note: For multi-bank RAM program, it is not easy to control RAM Bank selection. Users have to take care
the RBANK condition very carefully, especially for interrupt service routine. The system
won’t save the
RBANK and switch RAM bank to Bank 0, so these controls must be through program. It is a good to use
Bank 0 type instruction to process the situations.
The 1E6H, 1E7H of RAM address
doesn’t support directly addressing mode to access RAM but support
indirectly addressing mode @HL/@YZ.
