SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 54
Version 1.5
5.2 NORMAL MODE
The Normal Mode is system high clock operating mode. The system clock source is from high-speed oscillator. The
program is executed. After power on and any reset trigger released, the system inserts into normal mode to execute
program. When the system is wake-up from power down mode, the system also inserts into normal mode. In normal
mode, both of high-speed oscillator and low-speed oscillator active, and the power consumption is largest of all
operating modes.
The program is executed, and full functions are controllable.
The system rate is high-speed.
The high-speed oscillator and low-speed oscillator active.
Normal mode can be switched to other operating modes through OSCM register.
Power down mode is wake-up to normal mode.
Slow mode is switched to normal mode.
Green mode from normal mode is wake-up to normal mode.
5.3 SLOW MODE
The slow mode is system low clock operating mode. The system clock source is from external low-speed oscillator
including crystal type and RC type. The slow mode is controlled by CLKMD bit of OSCM register. When CLKMD=0, the
system is in normal mode. When CLKMD=1, the system inserts into slow mode. The high-speed oscillator wo
n’t be
disabled automatically after switching to slow mode, and must be disabled by SPTHX bit to reduce power consumption.
In slow mode, the system rate is fixed Flosc/4 (Flosc is external low-speed crystal type and RC type oscillator
frequency).
The program is executed, and full functions are controllable.
The system rate is low speed (Flosc/4).
The external low-speed oscillator actives, and the high-speed oscillator is controlled by STPHX=1. In slow mode,
to stop high speed oscillator is strongly recommendation.
Slow mode can be switched to other operating modes through OSCM register.
Power down mode from slow mode is wake-up to normal mode.
Normal mode is switched to slow mode.
Green mode from slow mode is wake-up to slow mode.
5.4 POWER DOWN MDOE
The power down mode is the system idle status. No program execution and oscillator operation. Whole chip is under
low power consumption status under 1uA. The power down mode is waked up by P0, P1 hardware level change trigger.
P1 wake-up function is controlled by P1W register. Any operating modes into power down mode, the system is waked
up to normal mode. Inserting power down mode is controlled by CPUM0 bit of OSCM register. W hen CPUM0=1, the
system inserts into power down mode. After system wake-up from power down mode, the CPUM0 bit is disabled (zero
status) automatically.
The program stops executing, and full functions are disabled.
All oscillators including external high-speed oscillator, internal high-speed PLL oscillator and external low-speed
oscillator stop.
The power consumption is under 1uA.
The system inserts into normal mode after wake-up from power down mode.
The power down mode wake-up source is P0 and P1 level change trigger.
Note: If the system is in normal mode, to set STPHX=1 to disable the high clock oscillator. The system is
under no system clock condition. This condition makes the system stay as power down mode, and can
be wake-up by P0, P1 level change trigger.
