SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 59
Version 1.7
6.2
INTEN INTERRUPT ENABLE REGISTER
INTEN is the interrupt request control register including one internal interrupts, one external interrupts enable control
bits. One of the register to be set “1” is to enable the interrupt request function. Once of the interrupt occur, the stack is
incremented and program jump to ORG 8 to execute interrupt service routines. The program exits the interrupt service
routine when the returning interrupt service routine instruction (RETI) is executed.
0C9H
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTEN
- USBIEN
TC0IEN
T0IEN - T2IEN
T1IEN
P00IEN
Read/Write -
R/W R/W R/W - R/W R/W R/W
After
reset
- 0 0 0 - 0 0 0
Bit 0
P00IEN:
External P0.0 interrupt (INT0) control bit.
0 = Disable INT0 interrupt function.
1 = Enable INT0 interrupt function.
Bit 1
T1IEN:
T1 timer capture interrupt control bit.
0 = Disable T1 interrupt function.
1 = Enable T1 interrupt function.
Bit 2
T2IEN:
T2 timer capture interrupt control bit.
0 = Disable T2 interrupt function.
1 = Enable T2 interrupt function.
Bit 4
T0IEN:
T0 timer interrupt control bit.
0 = Disable T0 interrupt function.
1 = Enable T0 interrupt function.
Bit 5
TC0IEN:
TC0 timer interrupt control bit.
0 = Disable TC0 interrupt function.
1 = Enable TC0 interrupt function.
Bit 6
USBIEN:
USB interrupt control bit.
0 = Disable USB interrupt function.
1 = Enable USB interrupt function.
