SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 26
Version 1.7
2.1.4 SYSTEM REGISTER
2.1.4.1
SYSTEM REGISTER TABLE
0 1 2 3 4 5 6 7 8 9 A B C D E F
8
- - R Z
Y -
PFLAG
RBANK
- - - - - - - -
9
- - - - - - - - - - - - - - - -
A
UDA UE0R UE1R UE2R
UE3R UDP0 UDR0
UDP1
UDR1
USTAT
US
UPID
T1M T1C T2M T2C
PS2M
B
- - - - - - - -
P0M
- - - - - - PEDGE
C
- P1M - - - P5M -
- INTRQ INTEN OSCM
- WDTR
TC0R
PCL
PCH
D
P0 P1 - - - P5 -
- T0M
T0C
TC0M
TC0C - - - STKP
E
P0UR
P1UR
- - -
P5UR
- @YZ
-
P1OC
- - - - - -
F
STK7L STK7H STK6L
STK6
H
STK5L STK5H STK4L
STK4H
STK3L STK3H STK2L STK2H STK1L STK1H STK0L STK0H
2.1.4.2
SYSTEM REGISTER DESCRIPTION
R = Working register and ROM look-up data buffer.
Y, Z = Working, @YZ and ROM addressing register.
PFLAG = ROM page and special flag register.
RBANK = RAM bank selection register.
UDA = USB control register.
UE0R~UE3R = Endpoint 0~3 control registers.
UDP0 = USB FiFo 0 address pointer.
UDR0 = USB FiFo 0 data buffer by UDP0 point to.
UDP1 = USB FiFo 1 address pointer.
UDR1 = USB FiFo 1 data buffer by UDP1 point to.
USTATUS = USB status register.
UPID = USB bus control register.
T1M = T1 mode register.
T1C = T1 counting register.
T2M = T2 mode register.
T2C = T2 counting register.
PS2M = PS2 control register.
PEDGE = P0.0 edge direction register.
PnM = Port n input/output mode register.
INTEN = Interrupt enable register.
INTRQ = Interrupt request register.
WDTR = Watchdog timer clear register.
OSCM = Oscillator mode register.
PCH, PCL = Program counter.
TC0R = TC0 auto-reload data buffer.
T0M = T0 mode register.
Pn = Port n data buffer.
TC0M = TC0 mode register.
T0C = T0 counting register.
STKP = Stack pointer buffer.
TC0C = TC0 counting register.
@YZ = RAM YZ indirect addressing index pointer.
PnUR = Port n pull-up resister control register.
STK0~STK3 = Stack 0 ~ stack 3 buffer.
P1OC = Port 1 open-drain control register.