
Solarflare
Server
Adapter
User
Guide
Solarflare
Adapters
on
Linux
Issue
20
©
Solarflare
Communications
2017
81
LACP
Bonding
LACP
Bonding
is
not
currently
supported
using
the
NIC
Partitioning
configuration
mode
as
the
LACP
partner
i.e.
the
switch
will
be
unaware
of
the
configured
partitions.
Users
are
advised
to
refer
to
the
sfc
driver
release
notes
for
current
limitations
when
using
the
NIC
partitioning
features.
3.16
Receive
Side
Scaling
(RSS)
Solarflare
adapters
support
Receive
Side
Scaling
(RSS).
RSS
enables
packet
receive
‐
processing
to
scale
with
the
number
of
available
CPU
cores.
RSS
requires
a
platform
that
supports
MSI
‐
X
interrupts.
RSS
is
enabled
by
default.
When
RSS
is
enabled
the
controller
uses
multiple
receive
queues
to
deliver
incoming
packets.
The
receive
queue
selected
for
an
incoming
packet
is
chosen
to
ensure
that
packets
within
a
TCP
stream
are
all
sent
to
the
same
receive
queue
–
this
ensures
that
packet
‐
ordering
within
each
stream
is
maintained.
Each
receive
queue
has
its
own
dedicated
MSI
‐
X
interrupt
which
ideally
should
be
tied
to
a
dedicated
CPU
core.
This
allows
the
receive
side
TCP
processing
to
be
distributed
amongst
the
available
CPU
cores,
providing
a
considerable
performance
advantage
over
a
conventional
adapter
architecture
in
which
all
received
packets
for
a
given
interface
are
processed
by
just
one
CPU
core.
RSS
can
be
restricted
to
only
process
receive
queues
on
the
NUMA
node
local
to
the
Solarflare
adapter.
To
configure
this
the
driver
module
option
rss_numa_local
should
be
set
to
1.
By
default
the
driver
enables
RSS
and
configures
one
RSS
Receive
queue
per
CPU
core.
The
number
of
RSS
Receive
queues
can
be
controlled
via
the
driver
module
parameter
rss_cpus
.
The
following
table
identifies
rss_cpus
options.
Table
17:
rss_cpus
Options
Option
Description
Interrupt
Affinity
(MSI
‐
X)
<num_cpus>
Indicates
the
number
of
RSS
queues
to
create.
A
separate
MSI
‐
X
interrupt
for
a
receive
queue
is
affinitized
to
each
CPU.
packages
An
RSS
queue
will
be
created
for
each
multi
‐
core
CPU
package.
The
first
CPU
in
the
package
will
be
chosen.
A
separate
MSI
‐
X
interrupt
for
a
receive
queue,
is
affinitized
to
each
of
the
designated
package
CPUs.