ARC130S SECTION
5
System Overview
ARC130S 060801 Version 1 Issue 1
5.2
BLOCK DIAGRAM DESCRIPTION
Referring to the block diagram (drawing ARC130S
), the OPI card decodes the D1 serial digital video
into separate luminance and chrominance data
streams and feeds them to FIFO buffers, which
allow for different input and output clock rates.
The data is then fed to the INT (Interpolator) card
where all the required vertical/temporal and
horizontal interpolation is carried out.
From the INT card the data is fed back to the OPI
card where it is applied to a gamut limiting circuit.
When gamut limiting is selected, any digital values
that would provide illegal video values are brought
within bounds.
From the gamut system, the data is output blanked
and converted back to serial digital (656) format
before being fed out of the unit.
Data from line 23 (625-line systems) is decoded
and, when Auto is selected, provides automatic
selection of the aspect ratio via the control circuits.
If the GPI interface option is fitted, an input on one
of the four lines can be used to select a memorised
output format and automatically set the output
aspect ratio.
The syncs and timing are obtained from the video
input, via a phase-locked-loop.
An internal pattern generator can be connected to
the output in place of the interpolated signal.
The control circuit on the OPI card accepts inputs
from the front panel, the card edge switches, or a
remote panel (as well as the GPI and line 23
inputs) and provides the necessary control signals
to the rest of the ARC 130S. It also provides an
output which is equal to the delay through the unit.
