High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Revision 1.4 (08-19-08)
314
SMSC LAN9312
DATASHEET
Switch Engine CSRs
1800h
SWE_ALR_CMD
Switch Engine ALR Command Register,
1801h
SWE_ALR_WR_DAT_0
Switch Engine ALR Write Data 0 Register,
1802h
SWE_ALR_WR_DAT_1
Switch Engine ALR Write Data 1 Register,
1803h-1804h
RESERVED
Reserved for Future Use
1805h
SWE_ALR_RD_DAT_0
Switch Engine ALR Read Data 0 Register,
1806h
SWE_ALR_RD_DAT_1
Switch Engine ALR Read Data 1 Register,
1807h
RESERVED
Reserved for Future Use
1808h
SWE_ALR_CMD_STS
Switch Engine ALR Command Status Register,
1809h
SWE_ALR_CFG
Switch Engine ALR Configuration Register,
180Ah
RESERVED
Reserved for Future Use
180Bh
SWE_VLAN_CMD
Switch Engine VLAN Command Register,
180Ch
SWE_VLAN_WR_DATA
Switch Engine VLAN Write Data Register,
180Dh
RESERVED
Reserved for Future Use
180Eh
SWE_VLAN_RD_DATA
Switch Engine VLAN Read Data Register,
180Fh
RESERVED
Reserved for Future Use
1810h
SWE_VLAN_CMD_STS
Switch Engine VLAN Command Status Register,
1811h
SWE_DIFFSERV_TBL_CMD
Switch Engine DIFSERV Table Command Register,
1812h
SWE_DIFFSERV_TBL_WR_DATA
Switch Engine DIFFSERV Table Write Data Register,
1813h
SWE_DIFFSERV_TBL_RD_DATA
Switch Engine DIFFSERV Table Read Data Register,
1814h
SWE_DIFFSERV_TBL_CMD_STS
Switch Engine DIFFSERV Table Command Status Register,
1815h-183Fh
RESERVED
Reserved for Future Use
1840h
SWE_GLB_INGRESS_CFG
Switch Engine Global Ingress Configuration Register,
1841h
SWE_PORT_INGRESS_CFG
Switch Engine Port Ingress Configuration Register,
1842h
SWE_ADMT_ONLY_VLAN
Switch Engine Admit Only VLAN Register,
1843h
SWE_PORT_STATE
Switch Engine Port State Register,
1844h
RESERVED
Reserved for Future Use
1845h
SWE_PRI_TO_QUE
Switch Engine Priority to Queue Register,
1846h
SWE_PORT_MIRROR
Switch Engine Port Mirroring Register,
Table 14.12 Indirectly Accessible Switch Control and Status Registers (continued)
REGISTER #
SYMBOL
REGISTER NAME