AN625
Rev. 0.1
25
3 = CMOS output driven high.
4 = CMOS input.
5 = 32 kHz clock.
7 = Divided MCU clock.
8 = High when command complete, low otherwise.
11 = Serial data out.
12 = Pulses high on power on reset.
14 = Pulses high when wakeup timer expires.
15 = unused0
16 = TX data CLK output to be used in conjuction with TX Data pin.
17 = RX data CLK output to be used in conjuction with RX Data pin.
18 = unused1
19 = TX data.
20 = RX data.
21 = RX raw data.
22 = Antenna 1 Switch used for antenna diversity.
23 = Antenna 2 Switch used for antenna diversity.
24 = High when a valid preamble is detected. Cleared when sync is received.
25 = High when an invalid preamble is detected. TODO: What clears this
26 = High when a sync word is detected. TODO: What clears this
27 = High when RSSI above clear channel assesment threshold, low when below threshold.
DRV_STRENGTH[6:5]
0 = GPIOs configured as outputs will have highest drive strength.
1 = GPIOs configured as outputs will have medium drive strength.
2 = GPIOs configured as outputs will have medium drive strength.
3 = GPIOs configured as outputs will have lowest drive strength.
Summary of Contents for Si446 Series
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