A N 9 3
132
Rev. 1.4
UAE is a bit-mapped register that sets the parameters for the enhanced intrusion detection algorithm. In general,
an intrusion is declared when the measured current is less than ACLM by an amount that is more than DCLM. UAE
resets to 0x0000 with a power-on or manual reset. The enhanced intrusion algorithm is enabled by setting AEM = 1
and initializing DCLM with a positive number.
Bits 15:8 (ACLM) represent the reference measurement of the loop current in units of 1.1 mA/bit. The modem
updates this value is periodically while the modem is off-hook unless FACL (U76 [8]) is set.
Bit 7 (AEM) enables the enhanced intrusion detection algorithm.
Bits 6:0 (DCLM) are the difference in current needed to declare an intrusion. The units are 1.1 mA/bit.
UD4 sets the power level of the SMS CAS tone detector threshold. The mapping of CASL to the detector threshold
is shown in Table XX. The default value is 0x0000.
U1D4 is a bit-mapped register with bits 15 and bits 13:0 reserved. U1D4 resets to 0x0000 with a power-on or
manual reset.
Bit 14 (SEF) = 0 (default) for normal modem operations. When SEF = 1, ePOS connections are enabled.
Table 94. UAE Bit Map
Bit
Name
Function
15:8
ACLM
Reference loop current for enhanced intrusion detection algorithm
7
AEM
Intrusion detection mode
0 = Legacy mode enabled
1 = Enhanced algorithm enabled
6
Reserved
This bit is reserved.
5:0
DCLM
Differential look current for enhanced intrusion detection algorithm
Table 95. U1D4 Bit Map
Bit
Name
Function
15
Reserved
Reads as zero
14
SEF
Standard ePOS Flag; must be set for any ePOS connection
0 = Normal modem connection
1 = connect as an ePOS terminal
13:0
Reserved
Reads as zero
Summary of Contents for Si2404
Page 2: ...AN93 2 Rev 1 4 ...
Page 200: ...AN93 200 Rev 1 4 Figure 31 TAM Handset and Speakerphone Voice Paths ...
Page 201: ...AN93 Rev 1 4 201 Figure 32 Si3000 Codec Gain and Signal Selection Options ...
Page 290: ...AN93 290 Rev 1 4 Figure 57 256 Band Spectral Display Figure 58 2048 Band Spectral Display ...
Page 305: ...AN93 Rev 1 4 305 Figure 76 Parallel or SPI Port Interrupt Service Flowchart ...