58
007-4330-002
5: Messages
06h
Initialize system hardware
08h
Initialize chipset with initial POST values
09h
Set IN POST flag
0Ah
Initialize CPU registers
0Bh
Enable CPU cache
0Ch
Initialize caches to initial POST values
0Eh
Initialize I/ O component
0Fh
Initialize the local bus IDE
10h
Initialize Power Management
11h
Load alternate registers with initial POST values
12h
Restore CPU control word during warm boot
13h
Initialize PCI Bus Mastering devices
14h
Initialize keyboard controller
16h
1- 2- 2- 3
BIOS ROM checksum
17h
Initialize cache before memory autosize
18h 8254
timer
initialization
1Ah
8237 DMA controller initialization
1Ch
Reset Programmable Interrupt Controller
20h
1- 3- 1- 1
Test DRAM refresh
22h
1- 3- 1- 3
Test 8742 Keyboard Controller
24h
Set ES segment register to 4 GB
26h
Enable A20 line
28h
1- 3- 3- 1
Autosize DRAM
29h
1- 3- 3- 2
Initialize POST Memory Manager
Table 5-1
(continued)
Test Point Codes
Code
Beeps
POST Routine Description
Summary of Contents for Zx10
Page 1: ...Silicon Graphics Zx10 System Board Guide Document Number 007 4330 001 ...
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Page 19: ...Block Diagram 007 4330 002 5 Figure 1 1 133MHz FSB Block Diagram ...
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